mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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bd8b866758
- delete vgpu_is_reduced_bar1(). Current implementation maps only that portion of BAR1 that is reserved for guest in case of reduced BAR1. However this code is obsolete and reduced BAR1 check is always false. Delete related function vgpu_is_reduced_bar1() and conditional mapping. - move vgpu_mm_bar1_map_userd() delcaration from vgpu.h to mm_vgpu.h - move vgpu_gp10b_init_hal() and vgpu_gv11b_init_hal() declarations from vgpu.h to new header files vgpu/gp10b/vgpu_hal_gp10b.h and vgpu/gv11b/vgpu_hal_gv11b.h respectively. Jira GVSCI-334 Change-Id: I11a297a0aba1afd8b0ad022169ba7f734bcd952c Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2081152 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
138 lines
2.8 KiB
C
138 lines
2.8 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/vgpu/vgpu.h>
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#include <nvgpu/vgpu/vgpu_ivc.h>
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#include <nvgpu/vgpu/vgpu_ivm.h>
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#include <nvgpu/vgpu/os_init_hal_vgpu.h>
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struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
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{
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BUG();
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return NULL;
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}
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int vgpu_ivc_init(struct gk20a *g, u32 elems,
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const size_t *queue_sizes, u32 queue_start, u32 num_queues)
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{
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BUG();
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return 0;
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}
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void vgpu_ivc_deinit(u32 queue_start, u32 num_queues)
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{
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BUG();
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}
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void vgpu_ivc_release(void *handle)
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{
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BUG();
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}
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u32 vgpu_ivc_get_server_vmid(void)
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{
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BUG();
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return 0U;
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}
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int vgpu_ivc_recv(u32 index, void **handle, void **data,
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size_t *size, u32 *sender)
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{
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BUG();
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return 0;
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}
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int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size)
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{
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BUG();
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return 0;
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}
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int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle,
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void **data, size_t *size)
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{
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BUG();
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return 0;
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}
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u32 vgpu_ivc_get_peer_self(void)
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{
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BUG();
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return 0U;
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}
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void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr,
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size_t *size)
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{
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BUG();
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return NULL;
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}
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void vgpu_ivc_oob_put_ptr(void *handle)
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{
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BUG();
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}
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struct tegra_hv_ivm_cookie *vgpu_ivm_mempool_reserve(unsigned int id)
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{
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BUG();
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return NULL;
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}
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int vgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie)
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{
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BUG();
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return 0;
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}
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u64 vgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie)
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{
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BUG();
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return 0ULL;
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}
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u64 vgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie)
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{
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BUG();
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return 0ULL;
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}
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void *vgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
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{
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BUG();
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return NULL;
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}
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void vgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
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void *addr)
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{
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BUG();
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}
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int vgpu_init_hal_os(struct gk20a *g)
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{
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BUG();
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return -ENOSYS;
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}
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