mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 10:34:43 +03:00
7e5b8b2cce
-Created perf.h file and moved all private functions and structures into it -Created single sw_setup/pmu_setup for whole perf unit -Changed public function and structure names as per standard format -Deleted lpwr unit specific file from make file as it is no longer used -Removed support_vfe and support_changeseq flags as it is no longer used -Removed clk_set_boot_fll_clks_per_clk_domain function as it is no longer used for tu10a -Removed perf unit headers from pmuif folder NVGPU-4448 Change-Id: Ia29e5b5a1a960b5474a929d8797542bf6c0eccf1 Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283587 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
110 lines
3.2 KiB
C
110 lines
3.2 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/pmu.h>
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#include <nvgpu/pmu/pmuif/nvgpu_cmdif.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/pmu/pmuif/ctrlclk.h>
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#include <nvgpu/pmu/pmuif/ctrlvolt.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/pmu/volt.h>
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#include <nvgpu/pmu/perf.h>
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#include <nvgpu/pmu/clk/clk.h>
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#include <nvgpu/pmu/cmd.h>
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#include <nvgpu/timers.h>
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#include <nvgpu/pmu/pmu_pstate.h>
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#include <nvgpu/pmu/perf.h>
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#include <nvgpu/pmu/clk/clk_vf_point.h>
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int nvgpu_clk_domain_freq_to_volt(struct gk20a *g, u8 clkdomain_idx,
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u32 *pclkmhz, u32 *pvoltuv, u8 railidx)
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{
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struct nvgpu_clk_vf_points *pclk_vf_points;
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struct boardobjgrp *pboardobjgrp;
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struct boardobj *pboardobj = NULL;
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int status = -EINVAL;
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struct clk_vf_point *pclk_vf_point;
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u8 index;
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nvgpu_log_info(g, " ");
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pclk_vf_points = g->pmu->clk_pmu->clk_vf_pointobjs;
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pboardobjgrp = &pclk_vf_points->super.super;
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BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
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pclk_vf_point = (struct clk_vf_point *)(void *)pboardobj;
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if((*pclkmhz) <= pclk_vf_point->pair.freq_mhz) {
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*pvoltuv = pclk_vf_point->pair.voltage_uv;
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return 0;
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}
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}
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return status;
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}
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#ifdef CONFIG_NVGPU_CLK_ARB
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int nvgpu_clk_get_fll_clks(struct gk20a *g,
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struct nvgpu_set_fll_clk *setfllclk)
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{
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return g->pmu->clk_pmu->get_fll(g, setfllclk);
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}
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#endif
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int nvgpu_clk_init_pmupstate(struct gk20a *g)
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{
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/* If already allocated, do not re-allocate */
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if (g->pmu->clk_pmu != NULL) {
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return 0;
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}
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g->pmu->clk_pmu = nvgpu_kzalloc(g, sizeof(*g->pmu->clk_pmu));
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if (g->pmu->clk_pmu == NULL) {
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return -ENOMEM;
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}
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return 0;
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}
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void nvgpu_clk_free_pmupstate(struct gk20a *g)
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{
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nvgpu_kfree(g, g->pmu->clk_pmu);
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g->pmu->clk_pmu = NULL;
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}
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u32 nvgpu_clk_mon_init_domains(struct gk20a *g)
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{
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u32 domain_mask;
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domain_mask = (CTRL_CLK_DOMAIN_MCLK |
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CTRL_CLK_DOMAIN_XBARCLK |
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CTRL_CLK_DOMAIN_SYSCLK |
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CTRL_CLK_DOMAIN_HUBCLK |
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CTRL_CLK_DOMAIN_GPCCLK |
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CTRL_CLK_DOMAIN_HOSTCLK |
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CTRL_CLK_DOMAIN_UTILSCLK |
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CTRL_CLK_DOMAIN_PWRCLK |
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CTRL_CLK_DOMAIN_NVDCLK |
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CTRL_CLK_DOMAIN_XCLK |
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CTRL_CLK_DOMAIN_NVL_COMMON |
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CTRL_CLK_DOMAIN_PEX_REFCLK );
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return domain_mask;
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}
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