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05ed37ae3a
This patch does the following:
(1) Removes the usage of hw headers in SDL unit. For this purpose, it moves
the initialization required for errors that can be injected using hw
support, error injection function. Further, it passes the required
information to SDL via hal layers.
(2) Renames (i) PWR as PMU, (ii) nvgpu_report_ecc_parity_err to
nvgpu_report_ecc_err.
Jira NVGPU-3235
Change-Id: I69290af78c09fbb5b792058e7bc6cc8b6ba340c9
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112837
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
68 lines
2.0 KiB
C
68 lines
2.0 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/nvgpu_err.h>
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struct gk20a;
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int nvgpu_report_host_err(struct gk20a *g, u32 hw_unit,
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u32 inst, u32 err_id, u32 intr_info)
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{
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return 0;
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}
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int nvgpu_report_ecc_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_type, u64 err_addr, u64 err_count)
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{
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return 0;
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}
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int nvgpu_report_gr_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_type, struct gr_err_info *err_info)
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{
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return 0;
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}
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int nvgpu_report_pmu_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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u32 sub_err_type, u32 status)
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{
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return 0;
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}
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int nvgpu_report_ce_err(struct gk20a *g, u32 hw_unit,
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u32 inst, u32 err_id, u32 intr_info)
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{
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return 0;
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}
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int nvgpu_report_pri_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_type, u32 err_addr, u32 err_code)
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{
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return 0;
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}
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int nvgpu_report_ctxsw_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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void *data)
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{
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return 0;
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}
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