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git://nv-tegra.nvidia.com/linux-nvgpu.git
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951ad46819
Changes: - Added Domain management APIs with interfaces to communicate with GSP scheduler. - Domain creation shall be done inside NVGPU and respective Domain and runlist info are sent to GSP for scheduling. Design: https://confluence.nvidia.com/display/TGS/GSP+Scheduler+Interface+Specifications NVGPU-7371 Signed-off-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com> Change-Id: Icba7f1ed3b9b2f409aac346084dd9a123c9d3779 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2682686 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
54 lines
1.8 KiB
C
54 lines
1.8 KiB
C
/*
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* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef GSP_SCHEDULER_H
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#define GSP_SCHEDULER_H
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#define GSP_SCHED_DEBUG_BUFFER_QUEUE 3U
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#define GSP_SCHED_DMESG_BUFFER_SIZE 0x1000U
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#define GSP_QUEUE_NUM 2U
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#define GSP_DBG_RISCV_FW_MANIFEST "sample-gsp.manifest.encrypt.bin.out.bin"
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#define GSP_DBG_RISCV_FW_CODE "sample-gsp.text.encrypt.bin"
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#define GSP_DBG_RISCV_FW_DATA "sample-gsp.data.encrypt.bin"
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/* GSP descriptor's */
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struct nvgpu_gsp_sched {
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struct nvgpu_gsp *gsp;
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struct gsp_sequences *sequences;
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struct nvgpu_engine_mem_queue *queues[GSP_QUEUE_NUM];
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u32 command_ack;
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/* set to true once init received */
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bool gsp_ready;
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/* Log info of Domains */
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u32 no_of_domains;
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u32 active_domain;
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};
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#endif /* GSP_SCHEDULER_H */
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