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db20451d0d
gr_gv100_init_hwpm_pmm_register() and gr_gv100_set_pmm_register() right now assume common chiplet stride for all sys/fbp/gpc and use common API g->ops.perf.get_pmm_per_chiplet_offset() to get the stride. Chiplet strides are same for all partitions only by chance, and future chip might change that. Hence add and use below 3 separate HALs to get appropriate strides. g->ops.perf.get_pmmsys_per_chiplet_offset() g->ops.perf.get_pmmgpc_per_chiplet_offset() g->ops.perf.get_pmmfbp_per_chiplet_offset() Also store sys/fbp/gpc perfmon count in struct gk20a after first query instead of querying them again and again. Querying the counts from HW is time consuming. Bug 2510974 Jira NVGPU-5360 Change-Id: I186009221009780d561617c0cd6f535854db585f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2413108 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
52 lines
2.0 KiB
C
52 lines
2.0 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_GM20B_PERF
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#define NVGPU_GM20B_PERF
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#ifdef CONFIG_NVGPU_DEBUGGER
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_mem;
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bool gm20b_perf_get_membuf_overflow_status(struct gk20a *g);
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u32 gm20b_perf_get_membuf_pending_bytes(struct gk20a *g);
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void gm20b_perf_set_membuf_handled_bytes(struct gk20a *g,
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u32 entries, u32 entry_size);
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void gm20b_perf_membuf_reset_streaming(struct gk20a *g);
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void gm20b_perf_enable_membuf(struct gk20a *g, u32 size, u64 buf_addr);
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void gm20b_perf_disable_membuf(struct gk20a *g);
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void gm20b_perf_init_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block);
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void gm20b_perf_deinit_inst_block(struct gk20a *g);
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u32 gm20b_perf_get_pmmsys_per_chiplet_offset(void);
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u32 gm20b_perf_get_pmmgpc_per_chiplet_offset(void);
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u32 gm20b_perf_get_pmmfbp_per_chiplet_offset(void);
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#endif /* CONFIG_NVGPU_DEBUGGER */
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#endif
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