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Update nvgpu_rc_pbdma_fault with invalid checks and add BVEC test for it. Make ga10b_fifo_pbdma_isr static. NVGPU-6772 Change-Id: I5485760c53e1fff1278557a5b25659a1fc0e4eaf Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2551617 (cherry picked from commit e917042d395d07cb902580bad3d5a7d0096cc303) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2623625 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
222 lines
6.7 KiB
C
222 lines
6.7 KiB
C
/*
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* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdlib.h>
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#include <sys/types.h>
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#include <unistd.h>
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#include <unit/io.h>
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#include <unit/unit.h>
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#include <nvgpu/types.h>
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#include <nvgpu/bitops.h>
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#include <nvgpu/pbdma.h>
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#include <nvgpu/pbdma_status.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/fifo.h>
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#include <nvgpu/engines.h>
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#include <nvgpu/posix/posix-fault-injection.h>
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#include "hal/init/hal_gv11b.h"
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#include "../nvgpu-fifo-common.h"
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#include "../nvgpu-fifo-gv11b.h"
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#include "nvgpu-pbdma.h"
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#ifdef PBDMA_UNIT_DEBUG
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#undef unit_verbose
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#define unit_verbose unit_info
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#else
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#define unit_verbose(unit, msg, ...) \
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do { \
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if (0) { \
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unit_info(unit, msg, ##__VA_ARGS__); \
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} \
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} while (0)
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#endif
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#define pruned test_fifo_subtest_pruned
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#define branches_str test_fifo_flags_str
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struct unit_ctx {
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u32 branches;
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};
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static struct unit_ctx unit_ctx;
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#define F_PBDMA_SETUP_SW_DEVICE_FATAL_0 BIT(0)
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#define F_PBDMA_SETUP_SW_CHANNEL_FATAL_0 BIT(1)
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#define F_PBDMA_SETUP_SW_RESTARTABLE_0 BIT(2)
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#define F_PBDMA_SETUP_SW_LAST BIT(3)
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static u32 stub_pbdma_device_fatal_0_intr_descs(void) {
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return F_PBDMA_SETUP_SW_DEVICE_FATAL_0;
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}
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static u32 stub_pbdma_channel_fatal_0_intr_descs(void) {
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return F_PBDMA_SETUP_SW_CHANNEL_FATAL_0;
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}
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static u32 stub_pbdma_restartable_0_intr_descs(void) {
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return F_PBDMA_SETUP_SW_RESTARTABLE_0;
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}
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int test_pbdma_setup_sw(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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struct nvgpu_fifo *f = &g->fifo;
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struct gpu_ops gops = g->ops;
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struct nvgpu_posix_fault_inj *kmem_fi;
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u32 branches = 0U;
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int ret = UNIT_FAIL;
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static const char *labels[] = {
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"device_fatal_0",
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"channel_fatal_0",
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"restartable_0",
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};
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u32 prune = 0U;
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int err;
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kmem_fi = nvgpu_kmem_get_fault_injection();
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err = test_fifo_setup_gv11b_reg_space(m, g);
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unit_assert(err == 0, goto done);
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gv11b_init_hal(g);
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for (branches = 0U; branches < F_PBDMA_SETUP_SW_LAST; branches++) {
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if (pruned(branches, prune)) {
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unit_verbose(m, "%s branches=%s (pruned)\n", __func__,
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branches_str(branches, labels));
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continue;
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}
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unit_verbose(m, "%s branches=%s\n", __func__,
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branches_str(branches, labels));
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f->intr.pbdma.device_fatal_0 = 0;
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f->intr.pbdma.channel_fatal_0 = 0;
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f->intr.pbdma.restartable_0 = 0;
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g->ops.pbdma.device_fatal_0_intr_descs =
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branches & F_PBDMA_SETUP_SW_DEVICE_FATAL_0 ?
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stub_pbdma_device_fatal_0_intr_descs : NULL;
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g->ops.pbdma.channel_fatal_0_intr_descs =
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branches & F_PBDMA_SETUP_SW_CHANNEL_FATAL_0 ?
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stub_pbdma_channel_fatal_0_intr_descs : NULL;
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g->ops.pbdma.restartable_0_intr_descs =
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branches & F_PBDMA_SETUP_SW_RESTARTABLE_0 ?
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stub_pbdma_restartable_0_intr_descs : NULL;
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err = nvgpu_pbdma_setup_sw(g);
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unit_assert(err == 0, goto done);
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unit_assert(f->intr.pbdma.device_fatal_0 ==
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(branches & F_PBDMA_SETUP_SW_DEVICE_FATAL_0),
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goto done);
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unit_assert(f->intr.pbdma.channel_fatal_0 ==
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(branches & F_PBDMA_SETUP_SW_CHANNEL_FATAL_0),
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goto done);
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unit_assert(f->intr.pbdma.restartable_0 ==
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(branches & F_PBDMA_SETUP_SW_RESTARTABLE_0),
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goto done);
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nvgpu_pbdma_cleanup_sw(g);
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}
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ret = UNIT_SUCCESS;
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done:
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if (ret != UNIT_SUCCESS) {
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unit_err(m, "%s branches=%s\n", __func__,
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branches_str(branches, labels));
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}
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g->ops = gops;
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nvgpu_posix_enable_fault_injection(kmem_fi, false, 0);
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return ret;
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}
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int test_pbdma_status(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int ret = UNIT_FAIL;
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struct nvgpu_pbdma_status_info pbdma_status;
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memset(&pbdma_status, 0, sizeof(pbdma_status));
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for (pbdma_status.chsw_status = NVGPU_PBDMA_CHSW_STATUS_INVALID;
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pbdma_status.chsw_status <= NVGPU_PBDMA_CHSW_STATUS_SWITCH;
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pbdma_status.chsw_status++)
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{
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unit_assert(nvgpu_pbdma_status_is_chsw_switch(&pbdma_status) ==
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(pbdma_status.chsw_status ==
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NVGPU_PBDMA_CHSW_STATUS_SWITCH), goto done);
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unit_assert(nvgpu_pbdma_status_is_chsw_load(&pbdma_status) ==
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(pbdma_status.chsw_status ==
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NVGPU_PBDMA_CHSW_STATUS_LOAD), goto done);
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unit_assert(nvgpu_pbdma_status_is_chsw_save(&pbdma_status) ==
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(pbdma_status.chsw_status ==
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NVGPU_PBDMA_CHSW_STATUS_SAVE), goto done);
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unit_assert(nvgpu_pbdma_status_is_chsw_valid(&pbdma_status) ==
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(pbdma_status.chsw_status ==
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NVGPU_PBDMA_CHSW_STATUS_VALID), goto done);
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unit_assert(nvgpu_pbdma_status_ch_not_loaded(&pbdma_status) ==
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(pbdma_status.chsw_status ==
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NVGPU_PBDMA_CHSW_STATUS_INVALID), goto done);
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}
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pbdma_status.id_type = PBDMA_STATUS_ID_TYPE_CHID;
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unit_assert(nvgpu_pbdma_status_is_id_type_tsg(&pbdma_status) == false,
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goto done);
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pbdma_status.id_type = PBDMA_STATUS_ID_TYPE_TSGID;
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unit_assert(nvgpu_pbdma_status_is_id_type_tsg(&pbdma_status) == true,
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goto done);
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pbdma_status.id_type = PBDMA_STATUS_ID_TYPE_INVALID;
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unit_assert(nvgpu_pbdma_status_is_id_type_tsg(&pbdma_status) == false,
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goto done);
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pbdma_status.next_id_type = PBDMA_STATUS_ID_TYPE_CHID;
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unit_assert(nvgpu_pbdma_status_is_next_id_type_tsg(&pbdma_status) ==
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false, goto done);
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pbdma_status.next_id_type = PBDMA_STATUS_ID_TYPE_TSGID;
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unit_assert(nvgpu_pbdma_status_is_next_id_type_tsg(&pbdma_status) ==
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true, goto done);
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pbdma_status.next_id_type = PBDMA_STATUS_ID_TYPE_INVALID;
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unit_assert(nvgpu_pbdma_status_is_next_id_type_tsg(&pbdma_status) ==
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false, goto done);
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ret = UNIT_SUCCESS;
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done:
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return ret;
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}
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struct unit_module_test nvgpu_pbdma_tests[] = {
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UNIT_TEST(setup_sw, test_pbdma_setup_sw, &unit_ctx, 0),
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UNIT_TEST(init_support, test_fifo_init_support, &unit_ctx, 0),
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UNIT_TEST(pbdma_status, test_pbdma_status, &unit_ctx, 0),
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UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 0),
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};
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UNIT_MODULE(nvgpu_pbdma, nvgpu_pbdma_tests, UNIT_PRIO_NVGPU_TEST);
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