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vgpu.c will keep common code whil vgpu_linux.c is linux specific. Jira EVLR-2364 Change-Id: Ice9782fa96c256f1b70320886d3720ab0db26244 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1649943 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
104 lines
3.4 KiB
C
104 lines
3.4 KiB
C
/*
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* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __VGPU_COMMON_H__
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#define __VGPU_COMMON_H__
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#include <nvgpu/types.h>
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#include <nvgpu/thread.h>
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#include <nvgpu/log.h>
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#include <nvgpu/vgpu/tegra_vgpu.h>
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struct device;
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struct tegra_vgpu_gr_intr_info;
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struct tegra_vgpu_fifo_intr_info;
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struct tegra_vgpu_cmd_msg;
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struct nvgpu_mem;
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struct gk20a;
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struct vm_gk20a;
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struct nvgpu_gr_ctx;
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struct nvgpu_cpu_time_correlation_sample;
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struct vgpu_priv_data {
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u64 virt_handle;
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struct nvgpu_thread intr_handler;
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struct tegra_vgpu_constants_params constants;
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};
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struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g);
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static inline u64 vgpu_get_handle(struct gk20a *g)
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{
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struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
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if (unlikely(!priv)) {
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nvgpu_err(g, "invalid vgpu_priv_data in %s", __func__);
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return INT_MAX;
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}
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return priv->virt_handle;
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}
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int vgpu_comm_init(struct gk20a *g);
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void vgpu_comm_deinit(void);
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int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in,
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size_t size_out);
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u64 vgpu_connect(void);
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int vgpu_get_attribute(u64 handle, u32 attrib, u32 *value);
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int vgpu_intr_thread(void *dev_id);
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void vgpu_remove_support_common(struct gk20a *g);
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void vgpu_detect_chip(struct gk20a *g);
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int vgpu_init_gpu_characteristics(struct gk20a *g);
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int vgpu_read_ptimer(struct gk20a *g, u64 *value);
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int vgpu_get_timestamps_zipper(struct gk20a *g,
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u32 source_id, u32 count,
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struct nvgpu_cpu_time_correlation_sample *samples);
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int vgpu_init_hal(struct gk20a *g);
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int vgpu_get_constants(struct gk20a *g);
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u64 vgpu_bar1_map(struct gk20a *g, struct nvgpu_mem *mem);
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int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info);
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int vgpu_gr_nonstall_isr(struct gk20a *g,
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struct tegra_vgpu_gr_nonstall_intr_info *info);
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int vgpu_gr_alloc_gr_ctx(struct gk20a *g,
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struct nvgpu_gr_ctx *gr_ctx,
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struct vm_gk20a *vm,
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u32 class,
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u32 flags);
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void vgpu_gr_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
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struct nvgpu_gr_ctx *gr_ctx);
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void vgpu_gr_handle_sm_esr_event(struct gk20a *g,
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struct tegra_vgpu_sm_esr_info *info);
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int vgpu_gr_init_ctx_state(struct gk20a *g);
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int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info);
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int vgpu_fifo_nonstall_isr(struct gk20a *g,
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struct tegra_vgpu_fifo_nonstall_intr_info *info);
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int vgpu_ce2_nonstall_isr(struct gk20a *g,
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struct tegra_vgpu_ce2_nonstall_intr_info *info);
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u32 vgpu_ce_get_num_pce(struct gk20a *g);
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int vgpu_init_mm_support(struct gk20a *g);
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int vgpu_init_gr_support(struct gk20a *g);
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int vgpu_init_fifo_support(struct gk20a *g);
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int vgpu_gp10b_init_hal(struct gk20a *g);
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int vgpu_gv11b_init_hal(struct gk20a *g);
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int vgpu_read_ptimer(struct gk20a *g, u64 *value);
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int vgpu_get_timestamps_zipper(struct gk20a *g,
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u32 source_id, u32 count,
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struct nvgpu_cpu_time_correlation_sample *samples);
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#endif
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