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959c02d675
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mm sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: Ieb87a62f047510e51c52e6563d8e3fd5a65b5f28 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1537753 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
/*
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* GM20B MMU
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "gk20a/gk20a.h"
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#include "mm_gm20b.h"
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#include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h>
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#include <nvgpu/hw/gm20b/hw_ram_gm20b.h>
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void gm20b_mm_set_big_page_size(struct gk20a *g,
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struct nvgpu_mem *mem, int size)
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{
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u32 val;
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gk20a_dbg_fn("");
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gk20a_dbg_info("big page size %d\n", size);
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val = nvgpu_mem_rd32(g, mem, ram_in_big_page_size_w());
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val &= ~ram_in_big_page_size_m();
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if (size == SZ_64K)
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val |= ram_in_big_page_size_64kb_f();
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else
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val |= ram_in_big_page_size_128kb_f();
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nvgpu_mem_wr32(g, mem, ram_in_big_page_size_w(), val);
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gk20a_dbg_fn("done");
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}
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u32 gm20b_mm_get_big_page_sizes(void)
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{
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return SZ_64K | SZ_128K;
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}
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u32 gm20b_mm_get_default_big_page_size(void)
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{
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return SZ_128K;
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}
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bool gm20b_mm_support_sparse(struct gk20a *g)
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{
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return true;
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}
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bool gm20b_mm_is_bar1_supported(struct gk20a *g)
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{
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return true;
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}
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u64 gm20b_gpu_phys_addr(struct gk20a *g,
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struct nvgpu_gmmu_attrs *attrs, u64 phys)
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{
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return phys;
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}
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