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5f010177de
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the pmu sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I8839ac99e87153637005e23b3013237f57275c54 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530982 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
58 lines
2.3 KiB
C
58 lines
2.3 KiB
C
/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __ACR_GP106_H_
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#define __ACR_GP106_H_
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#define GP106_FECS_UCODE_SIG "gp106/fecs_sig.bin"
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#define GP106_GPCCS_UCODE_SIG "gp106/gpccs_sig.bin"
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#define GP104_FECS_UCODE_SIG "gp104/fecs_sig.bin"
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#define GP104_GPCCS_UCODE_SIG "gp104/gpccs_sig.bin"
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int gp106_bootstrap_hs_flcn(struct gk20a *g);
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int gp106_prepare_ucode_blob(struct gk20a *g);
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int gp106_alloc_blob_space(struct gk20a *g,
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size_t size, struct nvgpu_mem *mem);
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void gp106_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf);
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void lsfm_free_ucode_img_res(struct gk20a *g,
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struct flcn_ucode_img_v1 *p_img);
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void lsfm_free_nonpmu_ucode_img_res(struct gk20a *g,
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struct flcn_ucode_img_v1 *p_img);
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int lsf_gen_wpr_requirements(struct gk20a *g,
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struct ls_flcn_mgr_v1 *plsfm);
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void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr_v1 *plsfm);
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void lsfm_fill_static_lsb_hdr_info(struct gk20a *g,
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u32 falcon_id, struct lsfm_managed_ucode_img_v2 *pnode);
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int gp106_pmu_populate_loader_cfg(struct gk20a *g,
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void *lsfm, u32 *p_bl_gen_desc_size);
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int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img);
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int fecs_ucode_details(struct gk20a *g,
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struct flcn_ucode_img_v1 *p_img);
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int gpccs_ucode_details(struct gk20a *g,
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struct flcn_ucode_img_v1 *p_img);
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int lsfm_add_ucode_img(struct gk20a *g, struct ls_flcn_mgr_v1 *plsfm,
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struct flcn_ucode_img_v1 *ucode_image, u32 falcon_id);
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int lsfm_discover_ucode_images(struct gk20a *g,
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struct ls_flcn_mgr_v1 *plsfm);
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void lsfm_init_wpr_contents(struct gk20a *g,
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struct ls_flcn_mgr_v1 *plsfm, struct nvgpu_mem *nonwpr);
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int gp106_flcn_populate_bl_dmem_desc(struct gk20a *g,
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void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
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int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g,
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struct lsfm_managed_ucode_img_v2 *pnode);
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#endif /*__PMU_GP106_H_*/
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