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865514be2d
Move the gp10b HW headers to a new directory specially for them: include/nvgpu/hw/gp10b And change the code to include like so: #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> This is part of the process to restructure the nvgpu driver. Bug 1799159 Change-Id: Ic80ea5b7f5c280839e502e2178a345181f7a7ef9 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1280326 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/*
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* GP10B Graphics
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "gk20a/gk20a.h"
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#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
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static u64 gp10b_detect_ecc_enabled_units(struct gk20a *g)
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{
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u64 ecc_enabled_units = 0;
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u32 opt_ecc_en = gk20a_readl(g, fuse_opt_ecc_en_r());
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u32 opt_feature_fuses_override_disable =
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gk20a_readl(g,
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fuse_opt_feature_fuses_override_disable_r());
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u32 fecs_feature_override_ecc =
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gk20a_readl(g,
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gr_fecs_feature_override_ecc_r());
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if (opt_feature_fuses_override_disable) {
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if (opt_ecc_en)
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ecc_enabled_units = NVGPU_GPU_FLAGS_ALL_ECC_ENABLED;
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else
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ecc_enabled_units = 0;
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} else {
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/* SM LRF */
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if (gr_fecs_feature_override_ecc_sm_lrf_override_v(
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fecs_feature_override_ecc)) {
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if (gr_fecs_feature_override_ecc_sm_lrf_v(
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fecs_feature_override_ecc)) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF;
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}
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} else {
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if (opt_ecc_en) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF;
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}
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}
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/* SM SHM */
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if (gr_fecs_feature_override_ecc_sm_shm_override_v(
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fecs_feature_override_ecc)) {
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if (gr_fecs_feature_override_ecc_sm_shm_v(
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fecs_feature_override_ecc)) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_SM_SHM;
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}
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} else {
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if (opt_ecc_en) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_SM_SHM;
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}
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}
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/* TEX */
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if (gr_fecs_feature_override_ecc_tex_override_v(
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fecs_feature_override_ecc)) {
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if (gr_fecs_feature_override_ecc_tex_v(
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fecs_feature_override_ecc)) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_TEX;
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}
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} else {
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if (opt_ecc_en) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_TEX;
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}
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}
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/* LTC */
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if (gr_fecs_feature_override_ecc_ltc_override_v(
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fecs_feature_override_ecc)) {
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if (gr_fecs_feature_override_ecc_ltc_v(
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fecs_feature_override_ecc)) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_LTC;
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}
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} else {
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if (opt_ecc_en) {
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ecc_enabled_units |=
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NVGPU_GPU_FLAGS_ECC_ENABLED_LTC;
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}
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}
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}
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return ecc_enabled_units;
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}
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int gp10b_init_gpu_characteristics(struct gk20a *g)
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{
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gk20a_init_gpu_characteristics(g);
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g->gpu_characteristics.flags |= gp10b_detect_ecc_enabled_units(g);
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return 0;
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}
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