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861b11a968
We right now store dmabuf fd and dma_buf pointer for gk20a_cs_snapshot_client But since dma_buf and all related APIs are linux specific, we need to remove them from common code and move them to linux specific code Add new linux specific structure gk20a_cs_snapshot_client_linux which includes struct gk20a_cs_snapshot_client and linux specific dma_buf pointer In gk20a_attach_cycle_stats_snapshot(), we first handle all dma_buf related operations and then call gr_gk20a_css_attach() Move gk20a_channel_free_cycle_stats_snapshot() to ioctl_channel.c In gk20a_channel_free_cycle_stats_snapshot(), we call gr_gk20a_css_detach() and then free up dma_buf in linux specific code We also need to call gk20a_channel_free_cycle_stats_snapshot() while closing the channel, so call it from linux specific nvgpu_channel_close_linux() Jira NVGPU-397 Jira NVGPU-415 Change-Id: Ida27240541f6adf31f28d7d7ee4f51651c6d3de2 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1603908 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
52 lines
1.7 KiB
C
52 lines
1.7 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __NVGPU_IOCTL_CHANNEL_H__
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#define __NVGPU_IOCTL_CHANNEL_H__
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#include <linux/fs.h>
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#include "gk20a/css_gr_gk20a.h"
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struct inode;
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struct file;
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struct gk20a;
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struct nvgpu_channel_open_args;
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struct gk20a_cs_snapshot_client_linux {
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struct gk20a_cs_snapshot_client cs_client;
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u32 dmabuf_fd;
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struct dma_buf *dma_handler;
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};
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int gk20a_channel_open(struct inode *inode, struct file *filp);
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int gk20a_channel_release(struct inode *inode, struct file *filp);
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long gk20a_channel_ioctl(struct file *filp,
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unsigned int cmd, unsigned long arg);
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int gk20a_channel_open_ioctl(struct gk20a *g,
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struct nvgpu_channel_open_args *args);
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int gk20a_channel_free_cycle_stats_snapshot(struct channel_gk20a *ch);
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extern const struct file_operations gk20a_event_id_ops;
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extern const struct file_operations gk20a_channel_ops;
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u32 nvgpu_event_id_to_ioctl_channel_event_id(u32 event_id);
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u32 nvgpu_get_common_runlist_level(u32 level);
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u32 nvgpu_get_ioctl_graphics_preempt_mode_flags(u32 graphics_preempt_mode_flags);
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u32 nvgpu_get_ioctl_compute_preempt_mode_flags(u32 compute_preempt_mode_flags);
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u32 nvgpu_get_ioctl_graphics_preempt_mode(u32 graphics_preempt_mode);
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u32 nvgpu_get_ioctl_compute_preempt_mode(u32 compute_preempt_mode);
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#endif
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