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Linux specific code should have GPL license. Bug 2755169 Change-Id: I8cbf96f4be2e77fde01ef976a79ec6c578185c23 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2237105 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
70 lines
1.7 KiB
C
70 lines
1.7 KiB
C
/*
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* Copyright (c) 2019, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/nvgpu_err.h>
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struct gk20a;
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struct mmu_fault_info;
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void nvgpu_report_host_err(struct gk20a *g, u32 hw_unit,
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u32 inst, u32 err_id, u32 intr_info)
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{
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return;
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}
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void nvgpu_report_ecc_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_id, u64 err_addr, u64 err_count)
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{
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return;
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}
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void nvgpu_report_gr_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_id, struct gr_err_info *err_info, u32 sub_err_type)
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{
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return;
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}
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void nvgpu_report_pmu_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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u32 sub_err_type, u32 status)
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{
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return;
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}
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void nvgpu_report_ce_err(struct gk20a *g, u32 hw_unit,
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u32 inst, u32 err_id, u32 intr_info)
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{
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return;
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}
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void nvgpu_report_pri_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_id, u32 err_addr, u32 err_code)
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{
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return;
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}
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void nvgpu_report_ctxsw_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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void *data)
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{
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return;
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}
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void nvgpu_report_mmu_err(struct gk20a *g, u32 hw_unit,
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u32 err_id, struct mmu_fault_info *fault_info,
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u32 status, u32 sub_err_type)
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{
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return;
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}
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