Philip Elcan 8c9a9f735d gpu: nvgpu: posix: fix MISRA 10.4 violations with ffs & fls ...

MISRA rule 10.4 prohibits operator operands having different essential
type. The POSIX ffs() and fls() implementations were subtracting a
signed value of 1 from a unsigned long. The 1 is updated to be 1ULL to
fix the violation.

JIRA NVGPU-3337

Change-Id: I57d64705a3069c05c02635f4dd70902e96046d7d
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109645
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-05-03 13:07:27 -07:00

..

nvgpu

gpu: nvgpu: posix: fix MISRA 10.4 violations with ffs & fls

2019-05-03 13:07:27 -07:00

Makefile

nvgpu: use kernel overlay features

2017-10-29 11:00:55 -07:00