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8d5536271f
Add new user API NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT which will expose per-channel allocated syncpoint to user space API will also return current value of the syncpoint On supported platforms, this API will also return a RW semaphore address (corresponding to syncpoint shim) to user space Add new characteristics flag NVGPU_GPU_FLAGS_SUPPORT_USER_SYNCPOINT to indicate support for this new API Add new flag NVGPU_SUPPORT_USER_SYNCPOINT for use of core driver Set this flag for GV11B and GP10B for now Add a new API (*syncpt_address) in struct gk20a_channel_sync to get GPU_VA address of a syncpoint Add new API nvgpu_nvhost_syncpt_read_maxval() which will read and return MAX value of syncpoint Bug 200326065 Jira NVGPU-179 Change-Id: I9da6f17b85996f4fc6731c0bf94fca6f3181c3e0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1658009 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
98 lines
3.7 KiB
C
98 lines
3.7 KiB
C
/*
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* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NVGPU_NVHOST_H__
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#define __NVGPU_NVHOST_H__
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#ifdef CONFIG_TEGRA_GK20A_NVHOST
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struct nvgpu_nvhost_dev;
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struct gk20a;
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struct sync_pt;
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struct sync_fence;
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struct timespec;
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int nvgpu_get_nvhost_dev(struct gk20a *g);
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void nvgpu_free_nvhost_dev(struct gk20a *g);
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int nvgpu_nvhost_module_busy_ext(struct nvgpu_nvhost_dev *nvhost_dev);
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void nvgpu_nvhost_module_idle_ext(struct nvgpu_nvhost_dev *nvhost_dev);
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void nvgpu_nvhost_debug_dump_device(struct nvgpu_nvhost_dev *nvhost_dev);
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int nvgpu_nvhost_syncpt_is_expired_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh);
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int nvgpu_nvhost_syncpt_wait_timeout_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh, u32 timeout, u32 *value, struct timespec *ts);
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u32 nvgpu_nvhost_syncpt_incr_max_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 incrs);
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void nvgpu_nvhost_syncpt_set_min_eq_max_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id);
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int nvgpu_nvhost_syncpt_read_ext_check(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 *val);
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u32 nvgpu_nvhost_syncpt_read_maxval(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id);
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int nvgpu_nvhost_intr_register_notifier(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh, void (*callback)(void *, int), void *private_data);
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const char *nvgpu_nvhost_syncpt_get_name(struct nvgpu_nvhost_dev *nvhost_dev,
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int id);
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bool nvgpu_nvhost_syncpt_is_valid_pt_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id);
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void nvgpu_nvhost_syncpt_put_ref_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id);
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u32 nvgpu_nvhost_get_syncpt_host_managed(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 param,
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const char *syncpt_name);
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int nvgpu_nvhost_create_symlink(struct gk20a *g);
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void nvgpu_nvhost_remove_symlink(struct gk20a *g);
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#ifdef CONFIG_SYNC
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u32 nvgpu_nvhost_sync_pt_id(struct sync_pt *pt);
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u32 nvgpu_nvhost_sync_pt_thresh(struct sync_pt *pt);
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int nvgpu_nvhost_sync_num_pts(struct sync_fence *fence);
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struct sync_fence *nvgpu_nvhost_sync_fdget(int fd);
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struct sync_fence *nvgpu_nvhost_sync_create_fence(
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struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh, const char *name);
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#endif /* CONFIG_SYNC */
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#ifdef CONFIG_TEGRA_T19X_GRHOST
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int nvgpu_nvhost_syncpt_unit_interface_get_aperture(
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struct nvgpu_nvhost_dev *nvhost_dev,
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u64 *base, size_t *size);
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u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(u32 syncpt_id);
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#else
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static inline int nvgpu_nvhost_syncpt_unit_interface_get_aperture(
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struct nvgpu_nvhost_dev *nvhost_dev,
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u64 *base, size_t *size) { return -EINVAL; }
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static inline u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(u32 syncpt_id) {
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return 0;
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}
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#endif
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#endif /* CONFIG_TEGRA_GK20A_NVHOST */
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#endif /* __NVGPU_NVHOST_H__ */
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