Richard Zhao 8ec6329878 gpu: nvgpu: correct register setting for debug mode ...

correct register settings for both set mmu debug mode and
set sm debug mode.

JIRA VFND-1005
Bug 1594604

Change-Id: I1d4b1d4b4cdd9d24d3b00481e0e22c4217f5a4b3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/833490
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>

2015-11-23 10:20:54 -08:00

..

gpu/nvgpu

gpu: nvgpu: correct register setting for debug mode

2015-11-23 10:20:54 -08:00