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Make an nvgpu DMA API include file so that the intricacies of the Linux DMA API can be hidden from the calling code. Also document the nvgpu DMA API. JIRA NVGPU-12 Change-Id: I7578e4c726ad46344b7921179d95861858e9a27e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1323326 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
486 lines
11 KiB
C
486 lines
11 KiB
C
/*
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* Nvgpu Semaphores
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#define pr_fmt(fmt) "gpu_sema: " fmt
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#include <linux/dma-mapping.h>
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#include <linux/highmem.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/semaphore.h>
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#include <nvgpu/kmem.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/mm_gk20a.h"
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#define __lock_sema_sea(s) \
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do { \
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gpu_sema_verbose_dbg("Acquiring sema lock..."); \
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nvgpu_mutex_acquire(&s->sea_lock); \
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gpu_sema_verbose_dbg("Sema lock aquried!"); \
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} while (0)
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#define __unlock_sema_sea(s) \
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do { \
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nvgpu_mutex_release(&s->sea_lock); \
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gpu_sema_verbose_dbg("Released sema lock"); \
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} while (0)
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/*
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* Return the sema_sea pointer.
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*/
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struct nvgpu_semaphore_sea *nvgpu_semaphore_get_sea(struct gk20a *g)
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{
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return g->sema_sea;
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}
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static int __nvgpu_semaphore_sea_grow(struct nvgpu_semaphore_sea *sea)
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{
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int ret = 0;
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struct gk20a *gk20a = sea->gk20a;
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__lock_sema_sea(sea);
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ret = gk20a_gmmu_alloc_flags_sys(gk20a, NVGPU_DMA_NO_KERNEL_MAPPING,
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PAGE_SIZE * SEMAPHORE_POOL_COUNT,
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&sea->sea_mem);
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if (ret)
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goto out;
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sea->ro_sg_table = sea->sea_mem.sgt;
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sea->size = SEMAPHORE_POOL_COUNT;
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sea->map_size = SEMAPHORE_POOL_COUNT * PAGE_SIZE;
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out:
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__unlock_sema_sea(sea);
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return ret;
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}
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void gk20a_semaphore_sea_destroy(struct gk20a *g)
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{
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if (!g->sema_sea)
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return;
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nvgpu_mutex_destroy(&g->sema_sea->sea_lock);
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nvgpu_kfree(g, g->sema_sea);
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g->sema_sea = NULL;
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}
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/*
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* Create the semaphore sea. Only create it once - subsequent calls to this will
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* return the originally created sea pointer.
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*/
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struct nvgpu_semaphore_sea *nvgpu_semaphore_sea_create(struct gk20a *g)
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{
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if (g->sema_sea)
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return g->sema_sea;
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g->sema_sea = nvgpu_kzalloc(g, sizeof(*g->sema_sea));
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if (!g->sema_sea)
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return NULL;
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g->sema_sea->size = 0;
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g->sema_sea->page_count = 0;
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g->sema_sea->gk20a = g;
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INIT_LIST_HEAD(&g->sema_sea->pool_list);
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if (nvgpu_mutex_init(&g->sema_sea->sea_lock))
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goto cleanup_free;
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if (__nvgpu_semaphore_sea_grow(g->sema_sea))
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goto cleanup_destroy;
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gpu_sema_dbg("Created semaphore sea!");
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return g->sema_sea;
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cleanup_destroy:
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nvgpu_mutex_destroy(&g->sema_sea->sea_lock);
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cleanup_free:
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nvgpu_kfree(g, g->sema_sea);
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g->sema_sea = NULL;
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gpu_sema_dbg("Failed to creat semaphore sea!");
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return NULL;
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}
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static int __semaphore_bitmap_alloc(unsigned long *bitmap, unsigned long len)
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{
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unsigned long idx = find_first_zero_bit(bitmap, len);
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if (idx == len)
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return -ENOSPC;
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set_bit(idx, bitmap);
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return (int)idx;
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}
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/*
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* Allocate a pool from the sea.
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*/
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struct nvgpu_semaphore_pool *nvgpu_semaphore_pool_alloc(
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struct nvgpu_semaphore_sea *sea)
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{
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struct nvgpu_semaphore_pool *p;
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unsigned long page_idx;
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int ret, err = 0;
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p = nvgpu_kzalloc(sea->gk20a, sizeof(*p));
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if (!p)
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return ERR_PTR(-ENOMEM);
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__lock_sema_sea(sea);
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err = nvgpu_mutex_init(&p->pool_lock);
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if (err)
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goto fail;
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ret = __semaphore_bitmap_alloc(sea->pools_alloced, SEMAPHORE_POOL_COUNT);
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if (ret < 0) {
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err = ret;
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goto fail_alloc;
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}
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page_idx = (unsigned long)ret;
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p->page = sea->sea_mem.pages[page_idx];
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p->ro_sg_table = sea->ro_sg_table;
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p->page_idx = page_idx;
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p->sema_sea = sea;
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INIT_LIST_HEAD(&p->hw_semas);
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kref_init(&p->ref);
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sea->page_count++;
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list_add(&p->pool_list_entry, &sea->pool_list);
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__unlock_sema_sea(sea);
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gpu_sema_dbg("Allocated semaphore pool: page-idx=%d", p->page_idx);
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return p;
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fail_alloc:
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nvgpu_mutex_destroy(&p->pool_lock);
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fail:
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__unlock_sema_sea(sea);
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nvgpu_kfree(sea->gk20a, p);
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gpu_sema_dbg("Failed to allocate semaphore pool!");
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return ERR_PTR(err);
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}
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/*
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* Map a pool into the passed vm's address space. This handles both the fixed
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* global RO mapping and the non-fixed private RW mapping.
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*/
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int nvgpu_semaphore_pool_map(struct nvgpu_semaphore_pool *p,
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struct vm_gk20a *vm)
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{
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int ents, err = 0;
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u64 addr;
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gpu_sema_dbg("Mapping sempahore pool! (idx=%d)", p->page_idx);
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p->cpu_va = vmap(&p->page, 1, 0,
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pgprot_writecombine(PAGE_KERNEL));
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gpu_sema_dbg(" %d: CPU VA = 0x%p!", p->page_idx, p->cpu_va);
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/* First do the RW mapping. */
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p->rw_sg_table = nvgpu_kzalloc(p->sema_sea->gk20a,
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sizeof(*p->rw_sg_table));
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if (!p->rw_sg_table)
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return -ENOMEM;
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err = sg_alloc_table_from_pages(p->rw_sg_table, &p->page, 1, 0,
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PAGE_SIZE, GFP_KERNEL);
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if (err) {
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err = -ENOMEM;
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goto fail;
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}
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/* Add IOMMU mapping... */
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ents = dma_map_sg(dev_from_vm(vm), p->rw_sg_table->sgl, 1,
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DMA_BIDIRECTIONAL);
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if (ents != 1) {
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err = -ENOMEM;
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goto fail_free_sgt;
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}
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gpu_sema_dbg(" %d: DMA addr = 0x%pad", p->page_idx,
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&sg_dma_address(p->rw_sg_table->sgl));
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/* Map into the GPU... Doesn't need to be fixed. */
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p->gpu_va = gk20a_gmmu_map(vm, &p->rw_sg_table, PAGE_SIZE,
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0, gk20a_mem_flag_none, false,
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APERTURE_SYSMEM);
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if (!p->gpu_va) {
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err = -ENOMEM;
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goto fail_unmap_sgt;
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}
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gpu_sema_dbg(" %d: GPU read-write VA = 0x%llx", p->page_idx,
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p->gpu_va);
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/*
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* And now the global mapping. Take the sea lock so that we don't race
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* with a concurrent remap.
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*/
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__lock_sema_sea(p->sema_sea);
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BUG_ON(p->mapped);
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addr = gk20a_gmmu_fixed_map(vm, &p->sema_sea->ro_sg_table,
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p->sema_sea->gpu_va, p->sema_sea->map_size,
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0,
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gk20a_mem_flag_read_only,
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false,
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APERTURE_SYSMEM);
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if (!addr) {
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err = -ENOMEM;
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BUG();
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goto fail_unlock;
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}
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p->gpu_va_ro = addr;
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p->mapped = 1;
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gpu_sema_dbg(" %d: GPU read-only VA = 0x%llx", p->page_idx,
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p->gpu_va_ro);
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__unlock_sema_sea(p->sema_sea);
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return 0;
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fail_unlock:
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__unlock_sema_sea(p->sema_sea);
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fail_unmap_sgt:
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dma_unmap_sg(dev_from_vm(vm), p->rw_sg_table->sgl, 1,
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DMA_BIDIRECTIONAL);
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fail_free_sgt:
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sg_free_table(p->rw_sg_table);
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fail:
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nvgpu_kfree(p->sema_sea->gk20a, p->rw_sg_table);
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p->rw_sg_table = NULL;
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gpu_sema_dbg(" %d: Failed to map semaphore pool!", p->page_idx);
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return err;
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}
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/*
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* Unmap a semaphore_pool.
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*/
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void nvgpu_semaphore_pool_unmap(struct nvgpu_semaphore_pool *p,
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struct vm_gk20a *vm)
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{
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struct nvgpu_semaphore_int *hw_sema;
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kunmap(p->cpu_va);
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/* First the global RO mapping... */
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__lock_sema_sea(p->sema_sea);
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gk20a_gmmu_unmap(vm, p->gpu_va_ro,
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p->sema_sea->map_size, gk20a_mem_flag_none);
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p->ro_sg_table = NULL;
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__unlock_sema_sea(p->sema_sea);
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/* And now the private RW mapping. */
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gk20a_gmmu_unmap(vm, p->gpu_va, PAGE_SIZE, gk20a_mem_flag_none);
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p->gpu_va = 0;
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dma_unmap_sg(dev_from_vm(vm), p->rw_sg_table->sgl, 1,
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DMA_BIDIRECTIONAL);
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sg_free_table(p->rw_sg_table);
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nvgpu_kfree(p->sema_sea->gk20a, p->rw_sg_table);
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p->rw_sg_table = NULL;
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list_for_each_entry(hw_sema, &p->hw_semas, hw_sema_list)
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/*
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* Make sure the mem addresses are all NULL so if this gets
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* reused we will fault.
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*/
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hw_sema->value = NULL;
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gpu_sema_dbg("Unmapped semaphore pool! (idx=%d)", p->page_idx);
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}
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/*
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* Completely free a sempahore_pool. You should make sure this pool is not
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* mapped otherwise there's going to be a memory leak.
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*/
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static void nvgpu_semaphore_pool_free(struct kref *ref)
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{
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struct nvgpu_semaphore_pool *p =
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container_of(ref, struct nvgpu_semaphore_pool, ref);
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struct nvgpu_semaphore_sea *s = p->sema_sea;
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struct nvgpu_semaphore_int *hw_sema, *tmp;
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WARN_ON(p->gpu_va || p->rw_sg_table || p->ro_sg_table);
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__lock_sema_sea(s);
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list_del(&p->pool_list_entry);
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clear_bit(p->page_idx, s->pools_alloced);
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s->page_count--;
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__unlock_sema_sea(s);
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list_for_each_entry_safe(hw_sema, tmp, &p->hw_semas, hw_sema_list)
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nvgpu_kfree(p->sema_sea->gk20a, hw_sema);
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nvgpu_mutex_destroy(&p->pool_lock);
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gpu_sema_dbg("Freed semaphore pool! (idx=%d)", p->page_idx);
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nvgpu_kfree(p->sema_sea->gk20a, p);
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}
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void nvgpu_semaphore_pool_get(struct nvgpu_semaphore_pool *p)
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{
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kref_get(&p->ref);
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}
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void nvgpu_semaphore_pool_put(struct nvgpu_semaphore_pool *p)
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{
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kref_put(&p->ref, nvgpu_semaphore_pool_free);
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}
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/*
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* Get the address for a semaphore_pool - if global is true then return the
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* global RO address instead of the RW address owned by the semaphore's VM.
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*/
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u64 __nvgpu_semaphore_pool_gpu_va(struct nvgpu_semaphore_pool *p, bool global)
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{
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if (!global)
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return p->gpu_va;
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return p->gpu_va_ro + (PAGE_SIZE * p->page_idx);
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}
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static int __nvgpu_init_hw_sema(struct channel_gk20a *ch)
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{
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int hw_sema_idx;
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int ret = 0;
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struct nvgpu_semaphore_int *hw_sema;
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struct nvgpu_semaphore_pool *p = ch->vm->sema_pool;
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BUG_ON(!p);
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nvgpu_mutex_acquire(&p->pool_lock);
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/* Find an available HW semaphore. */
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hw_sema_idx = __semaphore_bitmap_alloc(p->semas_alloced,
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PAGE_SIZE / SEMAPHORE_SIZE);
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if (hw_sema_idx < 0) {
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ret = hw_sema_idx;
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goto fail;
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}
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hw_sema = nvgpu_kzalloc(ch->g, sizeof(struct nvgpu_semaphore_int));
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if (!hw_sema) {
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ret = -ENOMEM;
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goto fail_free_idx;
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}
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ch->hw_sema = hw_sema;
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hw_sema->ch = ch;
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hw_sema->p = p;
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hw_sema->idx = hw_sema_idx;
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hw_sema->offset = SEMAPHORE_SIZE * hw_sema_idx;
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atomic_set(&hw_sema->next_value, 0);
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hw_sema->value = p->cpu_va + hw_sema->offset;
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writel(0, hw_sema->value);
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list_add(&hw_sema->hw_sema_list, &p->hw_semas);
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nvgpu_mutex_release(&p->pool_lock);
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return 0;
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fail_free_idx:
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clear_bit(hw_sema_idx, p->semas_alloced);
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fail:
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nvgpu_mutex_release(&p->pool_lock);
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return ret;
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}
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/*
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* Free the channel used semaphore index
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*/
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void nvgpu_semaphore_free_hw_sema(struct channel_gk20a *ch)
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{
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struct nvgpu_semaphore_pool *p = ch->vm->sema_pool;
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BUG_ON(!p);
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nvgpu_mutex_acquire(&p->pool_lock);
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clear_bit(ch->hw_sema->idx, p->semas_alloced);
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/* Make sure that when the ch is re-opened it will get a new HW sema. */
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list_del(&ch->hw_sema->hw_sema_list);
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nvgpu_kfree(ch->g, ch->hw_sema);
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ch->hw_sema = NULL;
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nvgpu_mutex_release(&p->pool_lock);
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}
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/*
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* Allocate a semaphore from the passed pool.
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*
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* Since semaphores are ref-counted there's no explicit free for external code
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* to use. When the ref-count hits 0 the internal free will happen.
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*/
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struct nvgpu_semaphore *nvgpu_semaphore_alloc(struct channel_gk20a *ch)
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{
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struct nvgpu_semaphore *s;
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int ret;
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if (!ch->hw_sema) {
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ret = __nvgpu_init_hw_sema(ch);
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if (ret)
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return NULL;
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}
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s = nvgpu_kzalloc(ch->g, sizeof(*s));
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if (!s)
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return NULL;
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kref_init(&s->ref);
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s->hw_sema = ch->hw_sema;
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atomic_set(&s->value, 0);
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/*
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* Take a ref on the pool so that we can keep this pool alive for
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* as long as this semaphore is alive.
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*/
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nvgpu_semaphore_pool_get(s->hw_sema->p);
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gpu_sema_dbg("Allocated semaphore (c=%d)", ch->hw_chid);
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return s;
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}
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static void nvgpu_semaphore_free(struct kref *ref)
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{
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struct nvgpu_semaphore *s =
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container_of(ref, struct nvgpu_semaphore, ref);
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nvgpu_semaphore_pool_put(s->hw_sema->p);
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nvgpu_kfree(s->hw_sema->ch->g, s);
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}
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void nvgpu_semaphore_put(struct nvgpu_semaphore *s)
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{
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kref_put(&s->ref, nvgpu_semaphore_free);
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}
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void nvgpu_semaphore_get(struct nvgpu_semaphore *s)
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{
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kref_get(&s->ref);
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}
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