mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 09:57:08 +03:00
843bbc726c
move below attributes to constants: TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH JIRA VFND-2103 Change-Id: I5d6aa8f4a49e65307989ef02d223c3ee31fcdeed Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1190481 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/*
|
|
* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2, as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include "gk20a/gk20a.h"
|
|
#include "vgpu_gr_gk20a.h"
|
|
|
|
static int vgpu_gk20a_init_fs_state(struct gk20a *g)
|
|
{
|
|
struct gr_gk20a *gr = &g->gr;
|
|
u32 tpc_index, gpc_index;
|
|
u32 sm_id = 0;
|
|
|
|
gk20a_dbg_fn("");
|
|
|
|
for (tpc_index = 0; tpc_index < gr->max_tpc_per_gpc_count;
|
|
tpc_index++) {
|
|
for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) {
|
|
if (tpc_index < gr->gpc_tpc_count[gpc_index]) {
|
|
g->gr.sm_to_cluster[sm_id].tpc_index =
|
|
tpc_index;
|
|
g->gr.sm_to_cluster[sm_id].gpc_index =
|
|
gpc_index;
|
|
|
|
sm_id++;
|
|
}
|
|
}
|
|
}
|
|
|
|
gr->no_of_sm = sm_id;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void vgpu_gk20a_init_gr_ops(struct gpu_ops *gops)
|
|
{
|
|
gops->gr.init_fs_state = vgpu_gk20a_init_fs_state;
|
|
}
|