Sagar Kamble 44c4611fda gpu: nvgpu: update pd clear condition to address IOMMU prefetch issue ...

IOMMU fault is observed with 64KB PAGE_SIZE. This is due to IOMMU
prefetching stale/invalid pd entries. IOMMU can prefetch more
than 4K worth of entries.

Clear pd when NVGPU_PD_CACHE_SIZE is more than 4K.

Bug 200719161

Change-Id: Iac2a9bcfbcfaa36840da1fa85594520a6fd4eaaf
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2521912
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

2021-04-30 11:07:48 -07:00

..

page_table.c

gpu: nvgpu: fix MISRA violations in Posix unit

2021-03-04 00:37:15 -08:00

pd_cache_priv.h

gpu: nvgpu: sim: make ring buffer independent of PAGE_SIZE

2020-12-15 14:13:28 -06:00

pd_cache.c

gpu: nvgpu: update pd clear condition to address IOMMU prefetch issue

2021-04-30 11:07:48 -07:00

pte.c

gpu: nvgpu: update nvgpu_pte_dbg_print function

2020-12-15 14:13:28 -06:00