Files
linux-nvgpu/drivers/gpu/nvgpu/common/acr/acr_sw_ga100.c
Antony Clince Alex d2919409e9 gpu: nvgpu: rename/collpase nvgpu_next functions and structs
Replace all nvgpu_next functions/structs either by 1) collapsing them
into nvgpu legacy functions/structs 2) renaming them as follows:
- nvgpu_next_*() => nvgpu_(ga10b/ga100)_*()
- nvgpu_next_*() => (ga10b/ga100)_*()
- nvgpu_next_*() => nvgpu_*() [only if this doesn't cause collision]
- nvgpu_next_*() = > nvgpu_*_extra()

Create hal.sim unit and move Ampere+ SIM code into it.

Jira NVGPU-4771

Change-Id: I215594a0d0df4bd663bd875a0d0db47bcb9ff6a2
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2548056
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-06-27 05:02:58 -07:00

60 lines
1.9 KiB
C

/*
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
*
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* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
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*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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*/
#include <nvgpu/gk20a.h>
#include <nvgpu/falcon.h>
#include "common/acr/acr_priv.h"
#include "common/acr/acr_sw_tu104.h"
#include "acr_sw_ga100.h"
static u32* ga100_get_versioned_sig(struct gk20a *g, struct nvgpu_acr *acr,
u32 *sig, u32 *sig_size)
{
u32 ucode_version = 0U;
u32 sig_size_words = 0U;
u32 sig_idx = 0;
nvgpu_log_fn(g, " ");
g->ops.fuse.read_ucode_version(g, FALCON_ID_SEC2, &ucode_version);
*sig_size = *sig_size/acr->num_of_sig;
sig_idx = (!ucode_version) ? 1U : 0U;
sig_size_words = *sig_size/4U;
sig = sig + nvgpu_safe_mult_u32(sig_idx, sig_size_words);
return sig;
}
void nvgpu_ga100_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr)
{
nvgpu_log_fn(g, " ");
acr->num_of_sig = 2U;
nvgpu_tu104_acr_sw_init(g, acr);
acr->get_versioned_sig = ga100_get_versioned_sig;
}