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a0b1b3f2be
IRQ register access will cause priv errors if they are accessed before priv lockdown is released. This change adds a polling loop to check priv lockdown before proceeding further while booting NVRISCV pmu. Bug 200709761 Signed-off-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com> Change-Id: I44b8ce4c59b5a9f20901e5ce08610d17725da779 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2512351 Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit