mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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Clean up the comptag-related data structures and allocation logic. The
most important change is that we only ever try comptag allocation once
to prevent incorrect map aliasing.
If we were to retry the allocation on further map calls, the following
situation would become possible:
(1) Request compressible kind mapping for a buffer. Comptag alloc failed
and we proceed with incompressible kind fallback.
(2) Request another compressible kind mapping for a buffer. Comptag alloc
retry succeeded and now we use the compressible kind.
(3) After writes through the compressible kind mapping, the buffer is no
longer legible via the fallback incompressible kind mapping.
The other changes are about removing the unused comptag-related fields
in gk20a_comptags and nvgpu_mapped_buf, and retrieving comptags info
only for compressible buffers. We also make nvgpu_ctag_buffer_info and
nvgpu_vm_compute_compression as private mm/vm.c definitions, since
they're not used elsewhere.
Bug 1902982
Change-Id: I0c9fe48ccc585a80dd2c05ec606a079c1c1d41f1
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595153
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
248 lines
5.9 KiB
C
248 lines
5.9 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/dma-buf.h>
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#include <linux/scatterlist.h>
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#include <nvgpu/comptags.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/linux/vm.h>
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#include <nvgpu/linux/vidmem.h>
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#include "gk20a/gk20a.h"
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#include "platform_gk20a.h"
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#include "dmabuf.h"
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#include "os_linux.h"
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static void gk20a_mm_delete_priv(void *_priv)
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{
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struct gk20a_buffer_state *s, *s_tmp;
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struct gk20a_dmabuf_priv *priv = _priv;
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struct gk20a *g;
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if (!priv)
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return;
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g = priv->g;
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if (priv->comptags.allocated && priv->comptags.lines) {
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BUG_ON(!priv->comptag_allocator);
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gk20a_comptaglines_free(priv->comptag_allocator,
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priv->comptags.offset,
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priv->comptags.lines);
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}
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/* Free buffer states */
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nvgpu_list_for_each_entry_safe(s, s_tmp, &priv->states,
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gk20a_buffer_state, list) {
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gk20a_fence_put(s->fence);
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nvgpu_list_del(&s->list);
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nvgpu_kfree(g, s);
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}
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nvgpu_kfree(g, priv);
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}
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enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
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struct dma_buf *dmabuf)
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{
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struct gk20a *buf_owner = nvgpu_vidmem_buf_owner(dmabuf);
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bool unified_memory = nvgpu_is_enabled(g, NVGPU_MM_UNIFIED_MEMORY);
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if (buf_owner == NULL) {
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/* Not nvgpu-allocated, assume system memory */
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return APERTURE_SYSMEM;
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} else if (WARN_ON(buf_owner == g && unified_memory)) {
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/* Looks like our video memory, but this gpu doesn't support
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* it. Warn about a bug and bail out */
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nvgpu_warn(g,
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"dmabuf is our vidmem but we don't have local vidmem");
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return APERTURE_INVALID;
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} else if (buf_owner != g) {
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/* Someone else's vidmem */
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return APERTURE_INVALID;
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} else {
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/* Yay, buf_owner == g */
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return APERTURE_VIDMEM;
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}
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}
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struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf)
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{
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struct gk20a_dmabuf_priv *priv;
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priv = dma_buf_get_drvdata(dmabuf, dev);
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if (WARN_ON(!priv))
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return ERR_PTR(-EINVAL);
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nvgpu_mutex_acquire(&priv->lock);
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if (priv->pin_count == 0) {
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priv->attach = dma_buf_attach(dmabuf, dev);
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if (IS_ERR(priv->attach)) {
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nvgpu_mutex_release(&priv->lock);
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return (struct sg_table *)priv->attach;
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}
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priv->sgt = dma_buf_map_attachment(priv->attach,
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DMA_BIDIRECTIONAL);
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if (IS_ERR(priv->sgt)) {
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dma_buf_detach(dmabuf, priv->attach);
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nvgpu_mutex_release(&priv->lock);
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return priv->sgt;
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}
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}
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priv->pin_count++;
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nvgpu_mutex_release(&priv->lock);
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return priv->sgt;
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}
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void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
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struct sg_table *sgt)
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{
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struct gk20a_dmabuf_priv *priv = dma_buf_get_drvdata(dmabuf, dev);
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dma_addr_t dma_addr;
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if (IS_ERR(priv) || !priv)
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return;
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nvgpu_mutex_acquire(&priv->lock);
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WARN_ON(priv->sgt != sgt);
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priv->pin_count--;
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WARN_ON(priv->pin_count < 0);
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dma_addr = sg_dma_address(priv->sgt->sgl);
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if (priv->pin_count == 0) {
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dma_buf_unmap_attachment(priv->attach, priv->sgt,
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DMA_BIDIRECTIONAL);
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dma_buf_detach(dmabuf, priv->attach);
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}
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nvgpu_mutex_release(&priv->lock);
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}
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int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev)
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{
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struct gk20a *g = gk20a_get_platform(dev)->g;
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struct gk20a_dmabuf_priv *priv;
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static u64 priv_count = 0;
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priv = dma_buf_get_drvdata(dmabuf, dev);
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if (likely(priv))
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return 0;
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nvgpu_mutex_acquire(&g->mm.priv_lock);
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priv = dma_buf_get_drvdata(dmabuf, dev);
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if (priv)
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goto priv_exist_or_err;
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priv = nvgpu_kzalloc(g, sizeof(*priv));
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if (!priv) {
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priv = ERR_PTR(-ENOMEM);
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goto priv_exist_or_err;
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}
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nvgpu_mutex_init(&priv->lock);
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nvgpu_init_list_node(&priv->states);
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priv->buffer_id = ++priv_count;
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priv->g = g;
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dma_buf_set_drvdata(dmabuf, dev, priv, gk20a_mm_delete_priv);
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priv_exist_or_err:
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nvgpu_mutex_release(&g->mm.priv_lock);
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if (IS_ERR(priv))
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return -ENOMEM;
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return 0;
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}
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int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
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u64 offset, struct gk20a_buffer_state **state)
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{
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int err = 0;
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struct gk20a_dmabuf_priv *priv;
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struct gk20a_buffer_state *s;
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struct device *dev = dev_from_gk20a(g);
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if (WARN_ON(offset >= (u64)dmabuf->size))
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return -EINVAL;
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err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
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if (err)
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return err;
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priv = dma_buf_get_drvdata(dmabuf, dev);
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if (WARN_ON(!priv))
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return -ENOSYS;
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nvgpu_mutex_acquire(&priv->lock);
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nvgpu_list_for_each_entry(s, &priv->states, gk20a_buffer_state, list)
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if (s->offset == offset)
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goto out;
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/* State not found, create state. */
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s = nvgpu_kzalloc(g, sizeof(*s));
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if (!s) {
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err = -ENOMEM;
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goto out;
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}
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s->offset = offset;
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nvgpu_init_list_node(&s->list);
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nvgpu_mutex_init(&s->lock);
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nvgpu_list_add_tail(&s->list, &priv->states);
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out:
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nvgpu_mutex_release(&priv->lock);
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if (!err)
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*state = s;
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return err;
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}
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int gk20a_mm_get_buffer_info(struct device *dev, int dmabuf_fd,
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u64 *buffer_id, u64 *buffer_len)
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{
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struct dma_buf *dmabuf;
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struct gk20a_dmabuf_priv *priv;
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int err = 0;
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dmabuf = dma_buf_get(dmabuf_fd);
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if (IS_ERR(dmabuf)) {
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dev_warn(dev, "%s: fd %d is not a dmabuf", __func__, dmabuf_fd);
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return PTR_ERR(dmabuf);
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}
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err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
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if (err) {
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dev_warn(dev, "Failed to allocate dmabuf drvdata (err = %d)",
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err);
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goto clean_up;
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}
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priv = dma_buf_get_drvdata(dmabuf, dev);
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if (likely(priv)) {
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*buffer_id = priv->buffer_id;
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*buffer_len = dmabuf->size;
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}
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clean_up:
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dma_buf_put(dmabuf);
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return err;
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}
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