Files
linux-nvgpu/drivers/gpu/nvgpu/libnvgpu-drv.export
Alex Waterman a0da2dee0f gpu: nvgpu: Move gk20a_init_mm_setup_hw to common/mm/mm.c
Move the gk20a_init_mm_setup_hw to common code. This function just
calls HALs to initialize various bits of HW. However, since this
code assumes that (some of) the HALs are present this code is treated
as a vGPU HAL (that is it's NULL for vGPU).

This patch also renames the MM HW init HAL.

Sicne the gv11b variant of this setup_hw HAL did have some differences
from the gk20a version the new common version required some work. The
gv11b code was copied into the common function but now the gv11b
specific calls were HAL'ified (since they will need to be anyway for
the MMU fault buf code) and protected by an if-condition.

JIRA NVGPU-2042

Change-Id: I959293394ee8793923d858ee37b7ce346096654f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2104541
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-26 09:36:56 -07:00

186 lines
3.9 KiB
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# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
__bug
__nvgpu_get_pte
__nvgpu_kfree
__nvgpu_kmalloc
__nvgpu_kzalloc
__nvgpu_log_dbg
__nvgpu_log_msg
__nvgpu_posix_ffs
__nvgpu_posix_fls
__nvgpu_readl
__nvgpu_set_pte
bitmap_clear
bitmap_find_next_zero_area_off
bitmap_set
bug_handler_cancel
bug_handler_register
clear_bit
fb_gv11b_read_mmu_fault_buffer_size
fb_gv11b_read_mmu_fault_status
fb_gv11b_write_mmu_fault_buffer_lo_hi
fb_gv11b_write_mmu_fault_buffer_size
find_first_bit
find_first_zero_bit
find_next_bit
gk20a_alloc_inst_block
gk20a_bus_set_bar0_window
gk20a_runlist_get_ch_entry
gk20a_runlist_get_tsg_entry
nvgpu_gmmu_map_locked
nvgpu_gmmu_unmap_locked
gk20a_ramin_alloc_size
gk20a_mm_fb_flush
gm20b_fb_tlb_invalidate
gm20b_fuse_status_opt_gpc
gm20b_ramin_set_big_page_size
gp10b_fb_compression_page_size
gp10b_init_bar2_vm
gp10b_mm_get_default_big_page_size
gp10b_mm_get_iommu_bit
gp10b_mm_get_mmu_levels
gp10b_ramin_init_pdb
gp10b_remove_bar2_vm
gv11b_channel_count
gv11b_fb_intr_enable
gv11b_fb_fault_buf_configure_hw
gv11b_fb_fault_buf_set_state_hw
gv11b_fb_init_hw
gv11b_fb_is_fault_buf_enabled
gv11b_fb_intr_is_mmu_fault_pending
gv11b_gpu_phys_addr
gv11b_init_inst_block
gv11b_mm_fault_info_mem_destroy
gv11b_mm_is_bar1_supported
gv11b_mm_l2_flush
gv11b_mm_mmu_fault_disable_hw
gv11b_mc_is_mmu_fault_pending
nvgpu_addr_is_vidmem_page_alloc
nvgpu_alloc
nvgpu_alloc_base
nvgpu_alloc_common_init
nvgpu_alloc_destroy
nvgpu_alloc_end
nvgpu_alloc_fixed
nvgpu_alloc_initialized
nvgpu_alloc_length
nvgpu_alloc_pte
nvgpu_alloc_release_carveout
nvgpu_alloc_reserve_carveout
nvgpu_alloc_space
nvgpu_allocator_init
nvgpu_aperture_mask
nvgpu_bar1_readl
nvgpu_bar1_writel
nvgpu_bsearch
nvgpu_dma_alloc
nvgpu_dma_alloc_get_fault_injection
nvgpu_dma_alloc_vid_at
nvgpu_dma_free
nvgpu_free
nvgpu_free_enabled_flags
nvgpu_free_fixed
nvgpu_gmmu_init_page_table
nvgpu_gmmu_map
nvgpu_gmmu_map_fixed
nvgpu_gmmu_unmap
nvgpu_init_enabled_flags
nvgpu_init_hal
nvgpu_init_mm_support
nvgpu_init_pramin
nvgpu_is_enabled
nvgpu_kmem_cache_alloc
nvgpu_kmem_cache_create
nvgpu_kmem_cache_destroy
nvgpu_kmem_cache_free
nvgpu_kmem_get_fault_injection
nvgpu_memset
nvgpu_mem_create_from_phys
nvgpu_mem_iommu_translate
nvgpu_mem_is_sysmem
nvgpu_mem_posix_create_from_list
nvgpu_mem_rd
nvgpu_mem_rd32
nvgpu_mem_rd32_pair
nvgpu_mem_rd_n
nvgpu_mem_sgl_dma
nvgpu_mem_sgl_gpu_addr
nvgpu_mem_sgl_length
nvgpu_mem_sgl_next
nvgpu_mem_sgl_phys
nvgpu_mem_sgt_free
nvgpu_mem_sgt_iommuable
nvgpu_mem_sgt_posix_create_from_list
nvgpu_mem_wr
nvgpu_mem_wr32
nvgpu_mem_wr_n
nvgpu_mm_setup_hw
nvgpu_mutex_acquire
nvgpu_mutex_destroy
nvgpu_mutex_init
nvgpu_mutex_release
nvgpu_mutex_tryacquire
nvgpu_page_allocator_init
nvgpu_pd_alloc
nvgpu_pd_cache_fini
nvgpu_pd_cache_init
nvgpu_pd_free
nvgpu_pd_gpu_addr
nvgpu_pd_offset_from_index
nvgpu_pd_write
nvgpu_posix_cleanup
nvgpu_posix_enable_fault_injection
nvgpu_posix_io_add_reg_space
nvgpu_posix_io_check_sequence
nvgpu_posix_io_delete_reg_space
nvgpu_posix_io_get_error_code
nvgpu_posix_io_init_reg_space
nvgpu_posix_io_readl_reg_space
nvgpu_posix_io_record_access
nvgpu_posix_io_start_recorder
nvgpu_posix_io_writel_reg_space
nvgpu_posix_is_fault_injection_triggered
nvgpu_posix_probe
nvgpu_posix_register_io
nvgpu_pramin_memset
nvgpu_pramin_rd_n
nvgpu_pramin_wr_n
nvgpu_raw_spinlock_acquire
nvgpu_raw_spinlock_init
nvgpu_raw_spinlock_release
nvgpu_rbtree_enum_next
nvgpu_rbtree_enum_start
nvgpu_readl
nvgpu_runlist_construct_locked
nvgpu_rwsem_init
nvgpu_set_enabled
nvgpu_sgt_alignment
nvgpu_sgt_create_from_mem
nvgpu_sgt_free
nvgpu_sgt_get_dma
nvgpu_sgt_get_gpu_addr
nvgpu_sgt_get_ipa
nvgpu_sgt_get_next
nvgpu_sgt_get_phys
nvgpu_sgt_iommuable
nvgpu_sgt_ipa_to_pa
nvgpu_spinlock_acquire
nvgpu_spinlock_init
nvgpu_spinlock_release
nvgpu_usermode_writel
nvgpu_vm_area_alloc
nvgpu_vm_area_free
nvgpu_vm_find_mapped_buf
nvgpu_vm_init
nvgpu_vm_map
nvgpu_vm_put
nvgpu_vm_unmap
nvgpu_writel
nvgpu_writel_check
set_bit
test_and_clear_bit
test_and_set_bit
test_bit
vm_aspace_id