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git://nv-tegra.nvidia.com/linux-nvgpu.git
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3484fd0d13
Added new RM Server command for regops. JIRA VFND-1128 Bug 1700139 Change-Id: Ia1cc63e993c29c91f87440c241077fa91edb9e53 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/923235 (cherry picked from commit 7de22e42cfd2e419ad64178b9f1f1ee16273bd03) Reviewed-on: http://git-master/r/841330 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
75 lines
2.0 KiB
C
75 lines
2.0 KiB
C
/*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/tegra_gr_comm.h>
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#include <linux/tegra_vgpu.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/channel_gk20a.h"
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#include "gk20a/dbg_gpu_gk20a.h"
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#include "vgpu.h"
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static int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s,
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struct nvgpu_dbg_gpu_reg_op *ops,
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u64 num_ops)
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{
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struct channel_gk20a *ch = dbg_s->ch;
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struct gk20a_platform *platform = gk20a_get_platform(dbg_s->g->dev);
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struct tegra_vgpu_cmd_msg msg;
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struct tegra_vgpu_reg_ops_params *p = &msg.params.reg_ops;
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void *oob;
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size_t oob_size;
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void *handle = NULL;
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int ops_size, err = 0;
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gk20a_dbg_fn("");
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BUG_ON(sizeof(*ops) != sizeof(struct tegra_vgpu_reg_op));
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handle = tegra_gr_comm_oob_get_ptr(TEGRA_GR_COMM_CTX_CLIENT,
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tegra_gr_comm_get_server_vmid(),
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TEGRA_VGPU_QUEUE_CMD,
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&oob, &oob_size);
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if (!handle)
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return -EINVAL;
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ops_size = sizeof(*ops) * num_ops;
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if (oob_size < ops_size) {
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err = -ENOMEM;
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goto fail;
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}
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memcpy(oob, ops, ops_size);
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msg.cmd = TEGRA_VGPU_CMD_REG_OPS;
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msg.handle = platform->virt_handle;
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p->handle = ch ? ch->virt_ctx : 0;
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p->num_ops = num_ops;
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p->is_profiler = dbg_s->is_profiler;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (!err)
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memcpy(ops, oob, ops_size);
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fail:
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tegra_gr_comm_oob_put_ptr(handle);
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return err;
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}
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void vgpu_dbg_init(void)
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{
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dbg_gpu_session_ops_gk20a.exec_reg_ops = vgpu_exec_regops;
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}
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