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move zbc hal files from common/gr/zbc to hal/gr/zbc directory. rename gr/zbc/gr_zbc.c -> gr/zbc.c and gr/zbc/gr_zbc.h -> gr/zbc_priv.h JIRA NVGPU-1882 Change-Id: I58c98c0a494b600a35a576a9d717114023118ee6 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2071962 GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
599 lines
14 KiB
C
599 lines
14 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/io.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/string.h>
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#include <nvgpu/power_features/pg.h>
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#include "zbc_priv.h"
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static int nvgpu_gr_zbc_add(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_entry *zbc_val)
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{
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struct zbc_color_table *c_tbl;
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struct zbc_depth_table *d_tbl;
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u32 i;
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int ret = -ENOSPC;
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bool added = false;
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u32 entries;
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/* no endian swap ? */
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nvgpu_mutex_acquire(&zbc->zbc_lock);
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nvgpu_speculation_barrier();
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switch (zbc_val->type) {
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case NVGPU_GR_ZBC_TYPE_COLOR:
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/* search existing tables */
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for (i = 0; i < zbc->max_used_color_index; i++) {
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c_tbl = &zbc->zbc_col_tbl[i];
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if ((c_tbl->ref_cnt != 0U) &&
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(c_tbl->format == zbc_val->format) &&
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(nvgpu_memcmp((u8 *)c_tbl->color_ds,
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(u8 *)zbc_val->color_ds,
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sizeof(zbc_val->color_ds)) == 0) &&
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(nvgpu_memcmp((u8 *)c_tbl->color_l2,
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(u8 *)zbc_val->color_l2,
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sizeof(zbc_val->color_l2)) == 0)) {
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added = true;
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c_tbl->ref_cnt++;
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ret = 0;
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break;
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}
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}
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/* add new table */
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if (!added &&
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zbc->max_used_color_index < NVGPU_GR_ZBC_TABLE_SIZE) {
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c_tbl =
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&zbc->zbc_col_tbl[zbc->max_used_color_index];
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WARN_ON(c_tbl->ref_cnt != 0U);
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ret = nvgpu_gr_zbc_add_color(g, zbc,
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zbc_val, zbc->max_used_color_index);
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if (ret == 0) {
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zbc->max_used_color_index++;
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}
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}
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break;
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case NVGPU_GR_ZBC_TYPE_DEPTH:
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/* search existing tables */
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for (i = 0; i < zbc->max_used_depth_index; i++) {
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d_tbl = &zbc->zbc_dep_tbl[i];
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if ((d_tbl->ref_cnt != 0U) &&
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(d_tbl->depth == zbc_val->depth) &&
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(d_tbl->format == zbc_val->format)) {
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added = true;
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d_tbl->ref_cnt++;
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ret = 0;
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break;
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}
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}
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/* add new table */
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if (!added &&
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zbc->max_used_depth_index < NVGPU_GR_ZBC_TABLE_SIZE) {
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d_tbl =
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&zbc->zbc_dep_tbl[zbc->max_used_depth_index];
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WARN_ON(d_tbl->ref_cnt != 0U);
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ret = nvgpu_gr_zbc_add_depth(g, zbc,
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zbc_val, zbc->max_used_depth_index);
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if (ret == 0) {
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zbc->max_used_depth_index++;
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}
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}
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break;
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case NVGPU_GR_ZBC_TYPE_STENCIL:
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL)) {
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added = nvgpu_gr_zbc_add_type_stencil(g, zbc,
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zbc_val, &ret);
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} else {
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nvgpu_err(g,
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"invalid zbc table type %d", zbc_val->type);
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ret = -EINVAL;
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goto err_mutex;
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}
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break;
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default:
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nvgpu_err(g,
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"invalid zbc table type %d", zbc_val->type);
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ret = -EINVAL;
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goto err_mutex;
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}
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if (!added && ret == 0) {
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/* update zbc for elpg only when new entry is added */
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entries = max(zbc->max_used_color_index,
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zbc->max_used_depth_index);
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if (g->elpg_enabled) {
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g->ops.pmu.save_zbc(g, entries);
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}
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}
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err_mutex:
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nvgpu_mutex_release(&zbc->zbc_lock);
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return ret;
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}
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int nvgpu_gr_zbc_add_depth(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_entry *depth_val, u32 index)
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{
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/* update l2 table */
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g->ops.ltc.set_zbc_depth_entry(g, depth_val->depth,
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index + NVGPU_GR_ZBC_STARTOF_TABLE);
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/* update local copy */
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zbc->zbc_dep_tbl[index].depth = depth_val->depth;
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zbc->zbc_dep_tbl[index].format = depth_val->format;
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zbc->zbc_dep_tbl[index].ref_cnt++;
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/* update zbc registers */
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g->ops.gr.zbc.add_depth(g, depth_val, index);
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return 0;
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}
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int nvgpu_gr_zbc_add_color(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_entry *color_val, u32 index)
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{
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u32 i;
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/* update l2 table */
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g->ops.ltc.set_zbc_color_entry(g, color_val->color_l2,
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index + NVGPU_GR_ZBC_STARTOF_TABLE);
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/* update local copy */
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for (i = 0; i < NVGPU_GR_ZBC_COLOR_VALUE_SIZE; i++) {
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zbc->zbc_col_tbl[index].color_l2[i] = color_val->color_l2[i];
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zbc->zbc_col_tbl[index].color_ds[i] = color_val->color_ds[i];
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}
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zbc->zbc_col_tbl[index].format = color_val->format;
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zbc->zbc_col_tbl[index].ref_cnt++;
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/* update zbc registers */
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g->ops.gr.zbc.add_color(g, color_val, index);
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return 0;
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}
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static int nvgpu_gr_zbc_load_default_table(struct gk20a *g,
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struct nvgpu_gr_zbc *zbc)
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{
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struct nvgpu_gr_zbc_entry zbc_val;
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u32 i = 0;
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int err = 0;
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err = nvgpu_mutex_init(&zbc->zbc_lock);
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if (err != 0) {
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nvgpu_err(g, "Error in zbc_lock mutex initialization");
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return err;
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}
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/* load default color table */
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zbc_val.type = NVGPU_GR_ZBC_TYPE_COLOR;
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/* Opaque black (i.e. solid black, fmt 0x28 = A8B8G8R8) */
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zbc_val.format = GR_ZBC_SOLID_BLACK_COLOR_FMT;
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for (i = 0; i < NVGPU_GR_ZBC_COLOR_VALUE_SIZE; i++) {
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zbc_val.color_ds[i] = 0U;
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zbc_val.color_l2[i] = 0U;
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}
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zbc_val.color_l2[0] = 0xff000000U;
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zbc_val.color_ds[3] = 0x3f800000U;
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto color_fail;
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}
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/* Transparent black = (fmt 1 = zero) */
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zbc_val.format = GR_ZBC_TRANSPARENT_BLACK_COLOR_FMT;
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for (i = 0; i < NVGPU_GR_ZBC_COLOR_VALUE_SIZE; i++) {
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zbc_val.color_ds[i] = 0U;
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zbc_val.color_l2[i] = 0U;
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}
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto color_fail;
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}
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/* Opaque white (i.e. solid white) = (fmt 2 = uniform 1) */
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zbc_val.format = GR_ZBC_SOLID_WHITE_COLOR_FMT;
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for (i = 0; i < NVGPU_GR_ZBC_COLOR_VALUE_SIZE; i++) {
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zbc_val.color_ds[i] = 0x3f800000U;
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zbc_val.color_l2[i] = 0xffffffffU;
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}
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto color_fail;
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}
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zbc->max_default_color_index = 3;
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/* load default depth table */
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zbc_val.type = NVGPU_GR_ZBC_TYPE_DEPTH;
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zbc_val.format = GR_ZBC_Z_FMT_VAL_FP32;
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zbc_val.depth = 0x3f800000;
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto depth_fail;
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}
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zbc_val.format = GR_ZBC_Z_FMT_VAL_FP32;
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zbc_val.depth = 0;
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto depth_fail;
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}
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zbc->max_default_depth_index = 2;
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL)) {
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err = nvgpu_gr_zbc_load_stencil_default_tbl(g, zbc);
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if (err != 0) {
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return err;
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}
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}
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return 0;
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color_fail:
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nvgpu_err(g, "fail to load default zbc color table");
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return err;
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depth_fail:
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nvgpu_err(g, "fail to load default zbc depth table");
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return err;
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}
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int nvgpu_gr_zbc_load_table(struct gk20a *g, struct nvgpu_gr_zbc *zbc)
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{
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unsigned int i;
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int ret;
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for (i = 0; i < zbc->max_used_color_index; i++) {
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struct zbc_color_table *c_tbl = &zbc->zbc_col_tbl[i];
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struct nvgpu_gr_zbc_entry zbc_val;
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zbc_val.type = NVGPU_GR_ZBC_TYPE_COLOR;
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nvgpu_memcpy((u8 *)zbc_val.color_ds,
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(u8 *)c_tbl->color_ds, sizeof(zbc_val.color_ds));
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nvgpu_memcpy((u8 *)zbc_val.color_l2,
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(u8 *)c_tbl->color_l2, sizeof(zbc_val.color_l2));
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zbc_val.format = c_tbl->format;
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ret = nvgpu_gr_zbc_add_color(g, zbc, &zbc_val, i);
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if (ret != 0) {
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return ret;
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}
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}
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for (i = 0; i < zbc->max_used_depth_index; i++) {
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struct zbc_depth_table *d_tbl = &zbc->zbc_dep_tbl[i];
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struct nvgpu_gr_zbc_entry zbc_val;
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zbc_val.type = NVGPU_GR_ZBC_TYPE_DEPTH;
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zbc_val.depth = d_tbl->depth;
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zbc_val.format = d_tbl->format;
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ret = nvgpu_gr_zbc_add_depth(g, zbc, &zbc_val, i);
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if (ret != 0) {
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return ret;
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}
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}
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL)) {
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ret = nvgpu_gr_zbc_load_stencil_tbl(g, zbc);
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if (ret != 0) {
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return ret;
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}
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}
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return 0;
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}
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int nvgpu_gr_zbc_stencil_query_table(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_query_params *query_params)
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{
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u32 index = query_params->index_size;
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if (index >= NVGPU_GR_ZBC_TABLE_SIZE) {
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nvgpu_err(g, "invalid zbc stencil table index");
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return -EINVAL;
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}
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nvgpu_speculation_barrier();
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query_params->depth = zbc->zbc_s_tbl[index].stencil;
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query_params->format = zbc->zbc_s_tbl[index].format;
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query_params->ref_cnt = zbc->zbc_s_tbl[index].ref_cnt;
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return 0;
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}
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int nvgpu_gr_zbc_load_stencil_default_tbl(struct gk20a *g,
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struct nvgpu_gr_zbc *zbc)
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{
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struct nvgpu_gr_zbc_entry zbc_val;
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int err;
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/* load default stencil table */
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zbc_val.type = NVGPU_GR_ZBC_TYPE_STENCIL;
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zbc_val.depth = 0x0;
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zbc_val.format = GR_ZBC_STENCIL_CLEAR_FMT_U8;
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto fail;
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}
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zbc_val.depth = 0x1;
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zbc_val.format = GR_ZBC_STENCIL_CLEAR_FMT_U8;
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto fail;
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}
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zbc_val.depth = 0xff;
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zbc_val.format = GR_ZBC_STENCIL_CLEAR_FMT_U8;
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err = nvgpu_gr_zbc_add(g, zbc, &zbc_val);
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if (err != 0) {
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goto fail;
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}
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zbc->max_default_s_index = 3;
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return 0;
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fail:
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nvgpu_err(g, "fail to load default zbc stencil table");
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return err;
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}
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static int gr_zbc_load_stencil_tbl(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_entry *stencil_val, u32 index)
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{
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/* update l2 table */
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if (g->ops.ltc.set_zbc_s_entry != NULL) {
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g->ops.ltc.set_zbc_s_entry(g, stencil_val->depth,
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index + NVGPU_GR_ZBC_STARTOF_TABLE);
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}
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/* update local copy */
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zbc->zbc_s_tbl[index].stencil = stencil_val->depth;
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zbc->zbc_s_tbl[index].format = stencil_val->format;
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zbc->zbc_s_tbl[index].ref_cnt++;
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/* update zbc stencil registers */
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return g->ops.gr.zbc.add_stencil(g, stencil_val, index);
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}
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int nvgpu_gr_zbc_load_stencil_tbl(struct gk20a *g, struct nvgpu_gr_zbc *zbc)
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{
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int ret;
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u32 i;
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for (i = 0; i < zbc->max_used_s_index; i++) {
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struct zbc_s_table *s_tbl = &zbc->zbc_s_tbl[i];
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struct nvgpu_gr_zbc_entry zbc_val;
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zbc_val.type = NVGPU_GR_ZBC_TYPE_STENCIL;
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zbc_val.depth = s_tbl->stencil;
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zbc_val.format = s_tbl->format;
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ret = gr_zbc_load_stencil_tbl(g, zbc, &zbc_val, i);
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if (ret != 0) {
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return ret;
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}
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}
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return 0;
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}
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bool nvgpu_gr_zbc_add_type_stencil(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_entry *zbc_val,
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int *ret_val)
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{
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struct zbc_s_table *s_tbl;
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u32 i;
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bool added = false;
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*ret_val = -ENOMEM;
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/* search existing tables */
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for (i = 0; i < zbc->max_used_s_index; i++) {
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s_tbl = &zbc->zbc_s_tbl[i];
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if ((s_tbl->ref_cnt != 0U) &&
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(s_tbl->stencil == zbc_val->depth) &&
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(s_tbl->format == zbc_val->format)) {
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added = true;
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s_tbl->ref_cnt++;
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*ret_val = 0;
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break;
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}
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}
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/* add new table */
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if (!added &&
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zbc->max_used_s_index < NVGPU_GR_ZBC_TABLE_SIZE) {
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s_tbl = &zbc->zbc_s_tbl[zbc->max_used_s_index];
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WARN_ON(s_tbl->ref_cnt != 0U);
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*ret_val = gr_zbc_load_stencil_tbl(g, zbc,
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zbc_val, zbc->max_used_s_index);
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if ((*ret_val) == 0) {
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zbc->max_used_s_index++;
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}
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}
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return added;
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}
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int nvgpu_gr_zbc_set_table(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
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struct nvgpu_gr_zbc_entry *zbc_val)
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|
{
|
|
nvgpu_log_fn(g, " ");
|
|
|
|
return nvgpu_pg_elpg_protected_call(g,
|
|
nvgpu_gr_zbc_add(g, zbc, zbc_val));
|
|
}
|
|
|
|
/* get a zbc table entry specified by index
|
|
* return table size when type is invalid */
|
|
int nvgpu_gr_zbc_query_table(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
|
|
struct nvgpu_gr_zbc_query_params *query_params)
|
|
{
|
|
u32 index = query_params->index_size;
|
|
u32 i;
|
|
|
|
nvgpu_speculation_barrier();
|
|
switch (query_params->type) {
|
|
case NVGPU_GR_ZBC_TYPE_INVALID:
|
|
query_params->index_size = NVGPU_GR_ZBC_TABLE_SIZE;
|
|
break;
|
|
case NVGPU_GR_ZBC_TYPE_COLOR:
|
|
if (index >= NVGPU_GR_ZBC_TABLE_SIZE) {
|
|
nvgpu_err(g,
|
|
"invalid zbc color table index");
|
|
return -EINVAL;
|
|
}
|
|
|
|
nvgpu_speculation_barrier();
|
|
for (i = 0; i < NVGPU_GR_ZBC_COLOR_VALUE_SIZE; i++) {
|
|
query_params->color_l2[i] =
|
|
zbc->zbc_col_tbl[index].color_l2[i];
|
|
query_params->color_ds[i] =
|
|
zbc->zbc_col_tbl[index].color_ds[i];
|
|
}
|
|
query_params->format = zbc->zbc_col_tbl[index].format;
|
|
query_params->ref_cnt = zbc->zbc_col_tbl[index].ref_cnt;
|
|
break;
|
|
case NVGPU_GR_ZBC_TYPE_DEPTH:
|
|
if (index >= NVGPU_GR_ZBC_TABLE_SIZE) {
|
|
nvgpu_err(g,
|
|
"invalid zbc depth table index");
|
|
return -EINVAL;
|
|
}
|
|
|
|
nvgpu_speculation_barrier();
|
|
query_params->depth = zbc->zbc_dep_tbl[index].depth;
|
|
query_params->format = zbc->zbc_dep_tbl[index].format;
|
|
query_params->ref_cnt = zbc->zbc_dep_tbl[index].ref_cnt;
|
|
break;
|
|
case NVGPU_GR_ZBC_TYPE_STENCIL:
|
|
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL)) {
|
|
return nvgpu_gr_zbc_stencil_query_table(g, zbc,
|
|
query_params);
|
|
} else {
|
|
nvgpu_err(g,
|
|
"invalid zbc table type");
|
|
return -EINVAL;
|
|
}
|
|
break;
|
|
default:
|
|
nvgpu_err(g,
|
|
"invalid zbc table type");
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int gr_zbc_allocate_local_tbls(struct gk20a *g, struct nvgpu_gr_zbc *zbc)
|
|
{
|
|
zbc->zbc_col_tbl = nvgpu_kzalloc(g,
|
|
sizeof(struct zbc_color_table) * NVGPU_GR_ZBC_TABLE_SIZE);
|
|
if (zbc->zbc_col_tbl == NULL) {
|
|
goto alloc_col_tbl_err;
|
|
}
|
|
|
|
zbc->zbc_dep_tbl = nvgpu_kzalloc(g,
|
|
sizeof(struct zbc_depth_table) * NVGPU_GR_ZBC_TABLE_SIZE);
|
|
|
|
if (zbc->zbc_dep_tbl == NULL) {
|
|
goto alloc_dep_tbl_err;
|
|
}
|
|
|
|
zbc->zbc_s_tbl = nvgpu_kzalloc(g,
|
|
sizeof(struct zbc_s_table) * NVGPU_GR_ZBC_TABLE_SIZE);
|
|
if (zbc->zbc_s_tbl == NULL) {
|
|
goto alloc_s_tbl_err;
|
|
}
|
|
|
|
return 0;
|
|
|
|
alloc_s_tbl_err:
|
|
nvgpu_kfree(g, zbc->zbc_dep_tbl);
|
|
alloc_dep_tbl_err:
|
|
nvgpu_kfree(g, zbc->zbc_col_tbl);
|
|
alloc_col_tbl_err:
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* allocate the struct and load the table */
|
|
int nvgpu_gr_zbc_init(struct gk20a *g, struct nvgpu_gr_zbc **zbc)
|
|
{
|
|
int ret = -ENOMEM;
|
|
struct nvgpu_gr_zbc *gr_zbc = NULL;
|
|
|
|
*zbc = NULL;
|
|
|
|
gr_zbc = nvgpu_kzalloc(g, sizeof(*gr_zbc));
|
|
if (gr_zbc == NULL) {
|
|
return ret;
|
|
}
|
|
|
|
ret = gr_zbc_allocate_local_tbls(g, gr_zbc);
|
|
if (ret != 0) {
|
|
goto alloc_err;
|
|
}
|
|
|
|
ret = nvgpu_gr_zbc_load_default_table(g, gr_zbc);
|
|
if (ret != 0) {
|
|
goto alloc_err;
|
|
}
|
|
|
|
*zbc = gr_zbc;
|
|
return ret;
|
|
|
|
alloc_err:
|
|
nvgpu_kfree(g, gr_zbc);
|
|
return ret;
|
|
}
|
|
|
|
/* deallocate the memory for the struct */
|
|
void nvgpu_gr_zbc_deinit(struct gk20a *g, struct nvgpu_gr_zbc *zbc)
|
|
{
|
|
nvgpu_kfree(g, zbc->zbc_col_tbl);
|
|
nvgpu_kfree(g, zbc->zbc_dep_tbl);
|
|
nvgpu_kfree(g, zbc->zbc_s_tbl);
|
|
nvgpu_kfree(g, zbc);
|
|
}
|