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c2906e0535
MISRA rule 8.3 requires that all declarations of a function shall use the same parameter names and type qualifiers. Fix 8.3 violations in nvlink code by matching the parameter names in function declaration and definition. JIRA NVGPU-1921 Change-Id: I3904ad9f9049bab0395398bf9c2f7e985b7c4d52 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2018195 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Dinesh T <dt@nvidia.com> Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
40 lines
1.7 KiB
C
40 lines
1.7 KiB
C
/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_NVLINK_TU104_H
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#define NVGPU_NVLINK_TU104_H
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#define TU104_CONNECTED_LINK_MASK 0x1
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struct gk20a;
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/* API */
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int tu104_nvlink_rxdet(struct gk20a *g, u32 link_id);
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int tu104_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask);
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u32 tu104_nvlink_link_get_tx_sublink_state(struct gk20a *g, u32 link_id);
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u32 tu104_nvlink_link_get_rx_sublink_state(struct gk20a *g, u32 link_id);
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int tu104_nvlink_minion_data_ready_en(struct gk20a *g, unsigned long link_mask,
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bool sync);
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void tu104_nvlink_get_connected_link_mask(u32 *link_mask);
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int tu104_nvlink_speed_config(struct gk20a *g);
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#endif
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