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1c991a58af
To achieve permanent fault coverage, the CTAs launched by each kernel in the mission and redundant contexts must execute on different hardware resources. This feature proposes modifications in the software to modify the virtual SM id to TPC mapping across the mission and redundant contexts. The virtual SM identifier to TPC mapping is done by nvgpu when setting up the patch context. The recommendation for the redundant setting is to offset the assignment by one TPC, and not by one GPC. This will ensure that both GPC and TPC diversity. The SM and Quadrant diversity will happen naturally. For kernels with few CTAs, the diversity is guaranteed to be 100%. In case of completely random CTA allocation, e.g. large number of CTAs in the waiting queue, the diversity is 1 - 1/#SM, or 87.5% for GV11B, 97.9% for TU104. Added NvGpu CFLAGS to enable/disable the SM diversity support "CONFIG_NVGPU_SM_DIVERSITY". This support is only enabled on gv11b and tu104 QNX non safety build. JIRA NVGPU-4685 Change-Id: I8e3eaa72d8cf7aff97f61e4c2abd10b2afe0fe8b Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2268026 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
244 lines
8.3 KiB
Makefile
244 lines
8.3 KiB
Makefile
#
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# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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# DEALINGS IN THE SOFTWARE.
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#
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# This file defines the make variables and cflags applicable to nvgpu common
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# shared by qnx, nvgpu userspace, test builds. Note that cflags are added to
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# variable NVGPU_COMMON_CFLAGS that needs to be used by the parent Makefile
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# to update corresponding cflags variable.
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# Default is the regular profile. That can be overridden if necessary. by
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# setting the NVGPU_FORCE_SAFETY_PROFILE. This is a useful hack while we
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# wait for the userspace tmake build to make its way into a proper safety
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# profile build.
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profile := default
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# Decide whether to use the safety release, safety debug or the regular profile.
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ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),1)
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profile := safety_release
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ifeq ($(NV_BUILD_CONFIGURATION_IS_DEBUG),1)
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profile := safety_debug
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endif
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endif
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ifeq ($(NVGPU_FORCE_SAFETY_PROFILE),1)
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profile := safety_release
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ifeq ($(NVGPU_FORCE_DEBUG_PROFILE),1)
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profile := safety_debug
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endif
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endif
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NVGPU_COMMON_CFLAGS :=
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#
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# Flags always enabled regardless of build profile.
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#
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NVGPU_COMMON_CFLAGS += \
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-DCONFIG_TEGRA_GK20A_NVHOST \
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-DCONFIG_TEGRA_T19X_GRHOST \
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-DCONFIG_NVGPU_SUPPORT_TURING \
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-DCONFIG_TEGRA_GK20A_PMU=1 \
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-DCONFIG_TEGRA_ACR=1 \
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-DCONFIG_NVGPU_GR_VIRTUALIZATION \
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-DCONFIG_PCI_MSI
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CONFIG_NVGPU_LOGGING := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_LOGGING
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ifeq ($(profile),$(filter $(profile),safety_debug safety_release))
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# Enable golden context verification only for safety debug/release build
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NVGPU_COMMON_CFLAGS += \
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-DCONFIG_NVGPU_GR_GOLDEN_CTX_VERIFICATION \
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-DCONFIG_NVGPU_BUILD_CONFIGURATION_IS_SAFETY
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endif
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#
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# Flags enabled only for safety debug and regular build profile.
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#
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ifneq ($(profile),safety_release)
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CONFIG_NVGPU_TRACE := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_TRACE
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_FALCON_DEBUG
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#
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# Flags enabled only for regular build profile.
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#
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ifneq ($(profile),safety_debug)
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CONFIG_NVGPU_SYSFS := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_SYSFS
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# ACR feature to enable old tegra ACR profile support
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CONFIG_NVGPU_ACR_LEGACY := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_ACR_LEGACY
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CONFIG_NVGPU_ENGINE_QUEUE := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_ENGINE_QUEUE
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CONFIG_NVGPU_DEBUGGER := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_DEBUGGER
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CONFIG_NVGPU_RECOVERY := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_RECOVERY
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CONFIG_NVGPU_CILP := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_CILP
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CONFIG_NVGPU_CYCLESTATS := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_CYCLESTATS
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CONFIG_NVGPU_FECS_TRACE := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_FECS_TRACE
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CONFIG_NVGPU_IGPU_VIRT := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_IGPU_VIRT
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# Enable the usage of 3LSS error injection features.
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CONFIG_NVGPU_USE_3LSS_ERR_INJECTION := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_USE_3LSS_ERR_INJECTION
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# Enable Graphics support for normal build
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CONFIG_NVGPU_GRAPHICS := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_GRAPHICS
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# Enable nvlink support for normal build.
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CONFIG_NVGPU_NVLINK := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_NVLINK
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# Enable tpc_powergate support for normal build.
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CONFIG_NVGPU_TPC_POWERGATE := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_TPC_POWERGATE
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# Enable mssnvlink0 reset control for normal build
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CONFIG_MSSNVLINK0_RST_CONTROL := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_MSSNVLINK0_RST_CONTROL
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# Enable dgpu support for normal build.
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CONFIG_NVGPU_DGPU := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_DGPU
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CONFIG_NVGPU_VPR := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_VPR
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CONFIG_NVGPU_REPLAYABLE_FAULT := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_REPLAYABLE_FAULT
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# Enable LS PMU support for normal build
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CONFIG_NVGPU_LS_PMU := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_LS_PMU
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# Enable elpg support for normal build
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CONFIG_NVGPU_POWER_PG := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_POWER_PG
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# Enable sim support for normal build
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CONFIG_NVGPU_SIM := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_SIM
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CONFIG_NVGPU_COMPRESSION := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_COMPRESSION
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# Enable non FUSA HALs for normal build
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CONFIG_NVGPU_HAL_NON_FUSA := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_HAL_NON_FUSA
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# Enable non FUSA common code for normal build
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CONFIG_NVGPU_NON_FUSA := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_NON_FUSA
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CONFIG_NVGPU_CLK_ARB := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_CLK_ARB
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_FALCON_NON_FUSA
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_IOCTL_NON_FUSA
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CONFIG_NVGPU_GR_FALCON_NON_SECURE_BOOT := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_GR_FALCON_NON_SECURE_BOOT
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CONFIG_NVGPU_SET_FALCON_ACCESS_MAP := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_SET_FALCON_ACCESS_MAP
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# Enable SW Semaphore for normal build
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CONFIG_NVGPU_SW_SEMAPHORE := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_SW_SEMAPHORE
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# Enable Channel WDT for safety build until we switch to user mode submits only
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_CHANNEL_WDT
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# Enable Kernel Mode submit for safety build until we switch to user mode
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# submits only
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CONFIG_NVGPU_KERNEL_MODE_SUBMIT := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_KERNEL_MODE_SUBMIT
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# Enable fences for safety build till until we switch to user mode submits only
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CONFIG_NVGPU_FENCE := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_FENCE
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# Enable powergate lib for normal build
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CONFIG_NVGPU_USE_POWERGATE_LIB := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_USE_POWERGATE_LIB
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
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# Enable dynamic busy/idle support
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CONFIG_NVGPU_DYNAMIC_BUSY_IDLE_SUPPORT := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_DYNAMIC_BUSY_IDLE_SUPPORT
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# Enable HW based error injection support
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_INJECT_HWERR
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# Enable Channel/TSG Scheduling
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CONFIG_NVGPU_CHANNEL_TSG_SCHEDULING := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_CHANNEL_TSG_SCHEDULING
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# Enable Channel/TSG Control
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CONFIG_NVGPU_CHANNEL_TSG_CONTROL := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_CHANNEL_TSG_CONTROL
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# Enable Virtualization server for normal build
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NVGPU_COMMON_CFLAGS += -DCONFIG_TEGRA_GR_VIRTUALIZATION_SERVER
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# Enable SM diversity support for normal build
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CONFIG_NVGPU_SM_DIVERSITY := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_SM_DIVERSITY
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endif
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endif
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# Enable USERD only if kernel mode submit is supported
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ifeq ($(CONFIG_NVGPU_KERNEL_MODE_SUBMIT),1)
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CONFIG_NVGPU_USERD := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_USERD
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endif
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ifeq ($(CONFIG_NVGPU_DEBUGGER),1)
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_ENGINE_RESET
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endif
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ifeq ($(CONFIG_NVGPU_RECOVERY),1)
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NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_ENGINE_RESET
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endif
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