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e19ee13cc7
For gv11b, set platform data for soc memory aperture type to sysmem instead of vidmem. Bug 1749338 Change-Id: I6632e79e3ca68c437e5b04f6865f8f0b6f2943ce Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1129169 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
156 lines
3.7 KiB
C
156 lines
3.7 KiB
C
/*
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* GV11B Tegra Platform Interface
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/of_platform.h>
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#include <linux/nvhost.h>
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#include <linux/debugfs.h>
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#include <linux/tegra-powergate.h>
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#include <linux/platform_data/tegra_edp.h>
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#include <uapi/linux/nvgpu.h>
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#include <linux/dma-buf.h>
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#include <linux/nvmap.h>
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#include <linux/tegra_pm_domains.h>
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#include <linux/reset.h>
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#include <linux/hashtable.h>
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#include "gk20a/platform_gk20a.h"
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#include "gk20a/gk20a.h"
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#include "platform_tegra.h"
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#include "gr_gv11b.h"
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#include "hw_gr_gv11b.h"
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/*
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* gv11b_tegra_get_clocks()
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*
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* This function finds clocks in tegra platform and populates
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* the clock information to gv11b platform data.
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*/
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static int gv11b_tegra_get_clocks(struct device *dev)
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{
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/* TODO */
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return 0;
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}
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static int gv11b_tegra_probe(struct device *dev)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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struct device_node *np = dev->of_node;
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struct device_node *host1x_node;
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struct platform_device *host1x_pdev;
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const __be32 *host1x_ptr;
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host1x_ptr = of_get_property(np, "nvidia,host1x", NULL);
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if (!host1x_ptr) {
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gk20a_err(dev, "host1x device not available");
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return -ENOSYS;
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}
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host1x_node = of_find_node_by_phandle(be32_to_cpup(host1x_ptr));
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host1x_pdev = of_find_device_by_node(host1x_node);
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if (!host1x_pdev) {
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gk20a_err(dev, "host1x device not available");
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return -ENOSYS;
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}
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platform->g->host1x_dev = host1x_pdev;
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platform->bypass_smmu = !device_is_iommuable(dev);
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platform->disable_bigpage = platform->bypass_smmu;
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platform->g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close
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= false;
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platform->g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close
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= false;
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platform->g->gr.t18x.ctx_vars.force_preemption_gfxp = false;
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platform->g->gr.t18x.ctx_vars.force_preemption_cilp = false;
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/* soc memory accessed as system memory aperture */
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platform->g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem;
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gv11b_tegra_get_clocks(dev);
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return 0;
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}
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static int gv11b_tegra_late_probe(struct device *dev)
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{
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/* Make gk20a power domain a subdomain of host1x */
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nvhost_register_client_domain(dev_to_genpd(dev));
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return 0;
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}
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static int gv11b_tegra_remove(struct device *dev)
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{
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/* remove gk20a power subdomain from host1x */
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nvhost_unregister_client_domain(dev_to_genpd(dev));
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return 0;
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}
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static bool gv11b_tegra_is_railgated(struct device *dev)
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{
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bool ret = false;
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return ret;
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}
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static int gv11b_tegra_railgate(struct device *dev)
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{
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return 0;
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}
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static int gv11b_tegra_unrailgate(struct device *dev)
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{
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int ret = 0;
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return ret;
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}
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static int gv11b_tegra_suspend(struct device *dev)
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{
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return 0;
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}
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struct gk20a_platform t19x_gpu_tegra_platform = {
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.has_syncpoints = false,
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/* power management configuration */
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/* ptimer src frequency in hz*/
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.ptimer_src_freq = 31250000,
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.probe = gv11b_tegra_probe,
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.late_probe = gv11b_tegra_late_probe,
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.remove = gv11b_tegra_remove,
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/* power management callbacks */
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.suspend = gv11b_tegra_suspend,
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.railgate = gv11b_tegra_railgate,
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.unrailgate = gv11b_tegra_unrailgate,
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.is_railgated = gv11b_tegra_is_railgated,
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.busy = gk20a_tegra_busy,
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.idle = gk20a_tegra_idle,
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.dump_platform_dependencies = gk20a_tegra_debug_dump,
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.default_big_page_size = SZ_64K,
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.soc_name = "tegra19x",
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.vidmem_is_vidmem = true,
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};
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