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a54e4f1d74
The copyengine code to do big transfers or memsets supports a 64-bit size. Each copy is done as a rectangle with either side being at most 2GB, so a size that does not align nicely is split into multiple ops. It turns out that there are at most two of these ops, so structure the code to not loop but do two ops explicitly. The first copyengine operation works with the first chunk that is less than two gigabytes long. That leaves the remaining size to be a multiple of two gigabytes, so it's sufficient to do just another operation as a 2D rectangle whose width is two gigabytes; the remaining size determines the height, i.e. the number of two-gig lines. The loop did just this already, but now with at most two operations per submit the required pushbuf length is seen more easily from the code. Jira NVGPU-5172 Change-Id: I6bca3b1204db3b79e131898c07018a1337d85774 Signed-off-by: Konsta Hölttä <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2402028 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
/*
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* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_CE_PRIV_H
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#define NVGPU_CE_PRIV_H
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#include <nvgpu/types.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/list.h>
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#include <nvgpu/lock.h>
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struct gk20a;
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/* ce context db */
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struct nvgpu_ce_gpu_ctx {
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struct gk20a *g;
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u32 ctx_id;
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struct nvgpu_mutex gpu_ctx_mutex;
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int gpu_ctx_state;
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/* tsg related data */
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struct nvgpu_tsg *tsg;
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/* channel related data */
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struct nvgpu_channel *ch;
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struct vm_gk20a *vm;
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/* cmd buf mem_desc */
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struct nvgpu_mem cmd_buf_mem;
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struct nvgpu_fence_type *postfences[NVGPU_CE_MAX_INFLIGHT_JOBS];
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struct nvgpu_list_node list;
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u32 cmd_buf_read_queue_offset;
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};
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/* global ce app db */
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struct nvgpu_ce_app {
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bool initialised;
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struct nvgpu_mutex app_mutex;
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int app_state;
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struct nvgpu_list_node allocated_contexts;
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u32 ctx_count;
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u32 next_ctx_id;
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};
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static inline struct nvgpu_ce_gpu_ctx *
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nvgpu_ce_gpu_ctx_from_list(struct nvgpu_list_node *node)
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{
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return (struct nvgpu_ce_gpu_ctx *)
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((uintptr_t)node - offsetof(struct nvgpu_ce_gpu_ctx, list));
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};
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u32 nvgpu_ce_prepare_submit(u64 src_buf,
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u64 dst_buf,
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u64 size,
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u32 *cmd_buf_cpu_va,
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u32 payload,
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u32 launch_flags,
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u32 request_operation,
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u32 dma_copy_class);
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#endif /*NVGPU_CE_PRIV_H*/
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