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e9c00c0da9
gv11b_mm_l2_flush was not checking error codes from the various functions it was calling. MISRA Rule-17.7 requires the return value of all functions to be used. This patch now checks return values and propagates the error upstream. JIRA NVGPU-677 Change-Id: I9005c6d3a406f9665d318014d21a1da34f87ca30 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1998809 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
43 lines
1.7 KiB
C
43 lines
1.7 KiB
C
/*
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* GV11B MM
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef MM_GV11B_H
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#define MM_GV11B_H
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struct gk20a;
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struct nvgpu_mem;
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struct vm_gk20a;
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bool gv11b_mm_is_bar1_supported(struct gk20a *g);
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void gv11b_init_inst_block(struct nvgpu_mem *inst_block,
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struct vm_gk20a *vm, u32 big_page_size);
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bool gv11b_mm_mmu_fault_pending(struct gk20a *g);
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int gv11b_init_mm_setup_hw(struct gk20a *g);
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int gv11b_mm_l2_flush(struct gk20a *g, bool invalidate);
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u64 gv11b_gpu_phys_addr(struct gk20a *g,
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struct nvgpu_gmmu_attrs *attrs, u64 phys);
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void gv11b_mm_fault_info_mem_destroy(struct gk20a *g);
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void gv11b_mm_mmu_fault_disable_hw(struct gk20a *g);
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#endif
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