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bbde800b35
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. This patch contains fix for all 17.7 violations instandard C functions in GPU specific files. JIRA NVGPU-1036 Change-Id: Iefadc38bdbea4f02de3c24b6ad1c71d6eb0af4bd Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1929903 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
93 lines
2.7 KiB
C
93 lines
2.7 KiB
C
/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/kmem.h>
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#include <nvgpu/vgpu/vgpu_ivc.h>
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#include <nvgpu/vgpu/vgpu.h>
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#include <nvgpu/errno.h>
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#include "vgpu/ecc_vgpu.h"
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int vgpu_ecc_get_info(struct gk20a *g)
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{
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struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
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struct tegra_vgpu_cmd_msg msg = {0};
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struct tegra_vgpu_ecc_info_params *p = &msg.params.ecc_info;
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struct tegra_vgpu_ecc_info_entry *entry;
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struct vgpu_ecc_stat *stats;
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void *handle;
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int err, i, count;
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size_t oob_size;
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msg.cmd = TEGRA_VGPU_CMD_GET_ECC_INFO;
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msg.handle = vgpu_get_handle(g);
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (unlikely(err)) {
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nvgpu_err(g, "vgpu get_ecc_info failed, err=%d", err);
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return err;
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}
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count = p->ecc_stats_count;
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handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(),
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TEGRA_VGPU_QUEUE_CMD,
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(void **)&entry, &oob_size);
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if (unlikely(!handle))
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return -EINVAL;
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if (unlikely(oob_size < count * sizeof(*entry))) {
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err = -E2BIG;
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goto out;
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}
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stats = nvgpu_kzalloc(g, count * sizeof(*stats));
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if (unlikely(!stats)) {
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err = -ENOMEM;
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goto out;
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}
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for (i = 0; i < count; i++) {
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stats[i].ecc_id = entry[i].ecc_id;
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(void) strncpy(stats[i].name, entry[i].name,
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NVGPU_ECC_STAT_NAME_MAX_SIZE);
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}
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priv->ecc_stats = stats;
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priv->ecc_stats_count = count;
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out:
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vgpu_ivc_oob_put_ptr(handle);
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return err;
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}
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void vgpu_ecc_remove_info(struct gk20a *g)
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{
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struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
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priv->ecc_stats_count = 0;
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if (priv->ecc_stats) {
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nvgpu_kfree(g, priv->ecc_stats);
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priv->ecc_stats = NULL;
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}
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}
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