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7f3f9268c0
- Update PMU version to support r370 - flcn_bl_dmem_desc_v1 params update to support PMU bootloader - PMU_UNIT_CLK value update JIRA DNVGPU-116 Change-Id: Ic4096e4a5ea55ca6b7c72670061e55b4719e0895 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1212834 (cherry picked from commit 32257231733303b0859230719f3857ad2d9d8820) Reviewed-on: http://git-master/r/1227289 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
83 lines
2.4 KiB
C
83 lines
2.4 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __ACR_GM206_H_
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#define __ACR_GM206_H_
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#include "gm20b/acr_gm20b.h"
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struct loader_config_v1 {
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u32 reserved;
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u32 dma_idx;
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struct falc_u64 code_dma_base;
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u32 code_size_total;
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u32 code_size_to_load;
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u32 code_entry_point;
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struct falc_u64 data_dma_base;
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u32 data_size;
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struct falc_u64 overlay_dma_base;
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u32 argc;
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u32 argv;
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};
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struct flcn_bl_dmem_desc_v1 {
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u32 reserved[4]; /*Should be the first element..*/
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u32 signature[4]; /*Should be the first element..*/
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u32 ctx_dma;
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struct falc_u64 code_dma_base;
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u32 non_sec_code_off;
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u32 non_sec_code_size;
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u32 sec_code_off;
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u32 sec_code_size;
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u32 code_entry_point;
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struct falc_u64 data_dma_base;
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u32 data_size;
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u32 argc;
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u32 argv;
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};
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/*!
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* Union of all supported structures used by bootloaders.
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*/
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union flcn_bl_generic_desc_v1 {
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struct flcn_bl_dmem_desc_v1 bl_dmem_desc_v1;
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struct loader_config_v1 loader_cfg_v1;
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};
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/*!
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* LSFM Managed Ucode Image
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* next : Next image the list, NULL if last.
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* wpr_header : WPR header for this ucode image
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* lsb_header : LSB header for this ucode image
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* bl_gen_desc : Bootloader generic desc structure for this ucode image
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* bl_gen_desc_size : Sizeof bootloader desc structure for this ucode image
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* full_ucode_size : Surface size required for final ucode image
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* ucode_img : Ucode image info
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*/
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struct lsfm_managed_ucode_img_v1 {
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struct lsfm_managed_ucode_img_v1 *next;
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struct lsf_wpr_header wpr_header;
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struct lsf_lsb_header lsb_header;
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union flcn_bl_generic_desc_v1 bl_gen_desc;
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u32 bl_gen_desc_size;
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u32 full_ucode_size;
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struct flcn_ucode_img ucode_img;
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};
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void gm206_init_secure_pmu(struct gpu_ops *gops);
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int gm206_alloc_blob_space(struct gk20a *g,
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size_t size, struct mem_desc *mem);
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void gm206_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf);
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#endif /*__ACR_GM206_H_*/
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