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The following CL contains the following VBIOS thermal table parsing and PMU interface support. 1) Thermal device table 2) Thermal channel table JIRA DNVGPU-130 Change-Id: I3c1baca3fec2727b6d20aa6c007096372a6a3efe Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1240631 (cherry picked from commit 1d6fa9ab49b1c84e7f845de206821d879cbda356) Reviewed-on: http://git-master/r/1246204 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
78 lines
2.2 KiB
C
78 lines
2.2 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _GPMUIFTHERMSENSOR_H_
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#define _GPMUIFTHERMSENSOR_H_
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#include "gk20a/gk20a.h"
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#include "gk20a/pmu_gk20a.h"
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#include "ctrl/ctrltherm.h"
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#include "pmuif/gpmuifboardobj.h"
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#include "gk20a/pmu_common.h"
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#define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_DEVICE 0x00
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#define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_CHANNEL 0x01
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#define NV_PMU_THERM_CMD_ID_BOARDOBJ_GRP_SET 0x0000000B
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#define NV_PMU_THERM_MSG_ID_BOARDOBJ_GRP_SET 0x00000008
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struct nv_pmu_therm_therm_device_boardobjgrp_set_header {
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struct nv_pmu_boardobjgrp_e32 super;
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};
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struct nv_pmu_therm_therm_device_boardobj_set {
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struct nv_pmu_boardobj super;
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};
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struct nv_pmu_therm_therm_device_i2c_boardobj_set {
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struct nv_pmu_therm_therm_device_boardobj_set super;
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u8 i2c_dev_idx;
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};
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union nv_pmu_therm_therm_device_boardobj_set_union {
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struct nv_pmu_boardobj board_obj;
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struct nv_pmu_therm_therm_device_boardobj_set therm_device;
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struct nv_pmu_therm_therm_device_i2c_boardobj_set i2c;
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};
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NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(therm, therm_device);
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struct nv_pmu_therm_therm_channel_boardobjgrp_set_header {
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struct nv_pmu_boardobjgrp_e32 super;
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};
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struct nv_pmu_therm_therm_channel_boardobj_set {
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struct nv_pmu_boardobj super;
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s16 scaling;
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s16 offset;
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s32 temp_min;
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s32 temp_max;
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};
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struct nv_pmu_therm_therm_channel_device_boardobj_set {
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struct nv_pmu_therm_therm_channel_boardobj_set super;
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u8 therm_dev_idx;
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u8 therm_dev_prov_idx;
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};
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union nv_pmu_therm_therm_channel_boardobj_set_union {
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struct nv_pmu_boardobj board_obj;
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struct nv_pmu_therm_therm_channel_boardobj_set therm_channel;
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struct nv_pmu_therm_therm_channel_device_boardobj_set device;
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};
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NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(therm, therm_channel);
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#endif
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