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JIRA DNVGPU-45 Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1205849 (cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126) Reviewed-on: http://git-master/r/1227256 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
57 lines
1.2 KiB
C
57 lines
1.2 KiB
C
/*
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* Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef NVGPU_BIOS_GM206_H
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#define NVGPU_BIOS_GM206_H
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#define PERF_PTRS_WIDTH 0x4
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#define PERF_PTRS_WIDTH_16 0x2
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enum {
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CLOCKS_TABLE = 2,
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CLOCK_PROGRAMMING_TABLE,
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FLL_TABLE,
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VIN_TABLE,
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FREQUENCY_CONTROLLER_TABLE
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};
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enum {
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PERFORMANCE_TABLE = 0,
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MEMORY_CLOCK_TABLE,
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MEMORY_TWEAK_TABLE,
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POWER_CONTROL_TABLE,
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THERMAL_CONTROL_TABLE,
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THERMAL_DEVICE_TABLE,
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THERMAL_COOLERS_TABLE,
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PERFORMANCE_SETTINGS_SCRIPT,
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CONTINUOUS_VIRTUAL_BINNING_TABLE,
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};
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enum {
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VP_FIELD_TABLE = 0,
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VP_FIELD_REGISTER,
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VP_TRANSLATION_TABLE,
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};
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struct bit_token {
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u8 token_id;
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u8 data_version;
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u16 data_size;
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u16 data_ptr;
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} __packed;
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struct gpu_ops;
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void gm206_init_bios(struct gpu_ops *gops);
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#endif
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