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f6ebdc5f29
Unset get_phys_addr_bits as PCIe devices do not need to care if SMMU is enabled or not. Jira VFND-1965 Change-Id: I358834863fb365092904da219be80d764f6af8ec Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1183089 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/*
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* GM206 memory management
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "gk20a/gk20a.h"
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#include "gm20b/mm_gm20b.h"
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#include "gm206/mm_gm206.h"
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#include "hw_fbpa_gm206.h"
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#include "hw_top_gm206.h"
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static size_t gm206_mm_get_vidmem_size(struct gk20a *g)
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{
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u32 fbpas = top_num_fbpas_value_v(
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gk20a_readl(g, top_num_fbpas_r()));
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u32 ram = fbpa_cstatus_ramamount_v(
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gk20a_readl(g, fbpa_cstatus_r()));
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return (size_t)fbpas * ram * SZ_1M;
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}
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void gm206_init_mm(struct gpu_ops *gops)
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{
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gm20b_init_mm(gops);
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gops->mm.get_vidmem_size = gm206_mm_get_vidmem_size;
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gops->mm.get_physical_addr_bits = NULL;
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}
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