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This patch covers unit test for nvgpu_writel_check(). Jira NVGPU-4810 Change-Id: I173afd59a9e8fe9e647f260a70012f2c7c2d02f9 Signed-off-by: Prateek sethi <prsethi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2293538 Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
73 lines
2.3 KiB
C
73 lines
2.3 KiB
C
/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <unit/io.h>
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#include <unit/unit.h>
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#include <include/nvgpu/posix/io.h>
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#include <nvgpu/types.h>
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#include <nvgpu/io.h>
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#include "common_io.h"
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#define USER_MODE_BASE (0x00810000U)
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#define NVGPU_READ_VAL (0xD007U)
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static void readl_access_reg_fn(struct gk20a *g,
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struct nvgpu_reg_access *access)
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{
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access->value = NVGPU_READ_VAL;
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}
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static void writel_access_reg_fn(struct gk20a *g,
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struct nvgpu_reg_access *access)
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{
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}
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static struct nvgpu_posix_io_callbacks ut_common_io_reg_callbacks = {
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.readl = readl_access_reg_fn,
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.writel = writel_access_reg_fn,
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};
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int test_writel_check(struct unit_module *m, struct gk20a *g, void *args)
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{
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nvgpu_posix_io_init_reg_space(g);
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nvgpu_posix_register_io(g, &ut_common_io_reg_callbacks);
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/* Value 0 will force to fail readback call as read API returns
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* NVGPU_READ_VAL. */
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nvgpu_writel_check(g, USER_MODE_BASE, 0);
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/* Value NVGPU_READ_VAL will pass the readback call as read API returns
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* NVGPU_READ_VAL. */
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nvgpu_writel_check(g, USER_MODE_BASE, NVGPU_READ_VAL);
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return UNIT_SUCCESS;
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}
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struct unit_module_test io_tests[] = {
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UNIT_TEST(writel_check, test_writel_check, NULL, 0),
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};
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UNIT_MODULE(io, io_tests, UNIT_PRIO_NVGPU_TEST);
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