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8381eeea4f
Update the include location of gk20a.h to include/nvgpu/gk20a.h in the following directories. nvgpu/gm20b/ nvgpu/gp10b/ nvgpu/gv11b/ Jira NVGPU-597 Change-Id: Ie38d4a72bb65c41bd30058350509bfa7e87bb64e Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1822789 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
119 lines
3.5 KiB
C
119 lines
3.5 KiB
C
/*
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* GP10B Graphics
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*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/io.h>
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#include "gp10b.h"
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#include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
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static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
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{
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bool opt_ecc_en = g->ops.fuse.is_opt_ecc_enable(g);
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bool opt_feature_fuses_override_disable =
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g->ops.fuse.is_opt_feature_override_disable(g);
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u32 fecs_feature_override_ecc =
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gk20a_readl(g,
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gr_fecs_feature_override_ecc_r());
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if (opt_feature_fuses_override_disable) {
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if (opt_ecc_en) {
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__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_SM_LRF, true);
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__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_SM_SHM, true);
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__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_TEX, true);
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__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_LTC, true);
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}
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} else {
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/* SM LRF */
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if (gr_fecs_feature_override_ecc_sm_lrf_override_v(
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fecs_feature_override_ecc) == 1U) {
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if (gr_fecs_feature_override_ecc_sm_lrf_v(
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fecs_feature_override_ecc) == 1U) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_SM_LRF, true);
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}
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} else {
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if (opt_ecc_en) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_SM_LRF, true);
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}
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}
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/* SM SHM */
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if (gr_fecs_feature_override_ecc_sm_shm_override_v(
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fecs_feature_override_ecc) == 1U) {
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if (gr_fecs_feature_override_ecc_sm_shm_v(
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fecs_feature_override_ecc) == 1U) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_SM_SHM, true);
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}
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} else {
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if (opt_ecc_en) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_SM_SHM, true);
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}
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}
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/* TEX */
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if (gr_fecs_feature_override_ecc_tex_override_v(
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fecs_feature_override_ecc) == 1U) {
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if (gr_fecs_feature_override_ecc_tex_v(
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fecs_feature_override_ecc) == 1U) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_TEX, true);
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}
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} else {
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if (opt_ecc_en) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_TEX, true);
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}
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}
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/* LTC */
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if (gr_fecs_feature_override_ecc_ltc_override_v(
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fecs_feature_override_ecc) == 1U) {
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if (gr_fecs_feature_override_ecc_ltc_v(
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fecs_feature_override_ecc) == 1U) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_LTC, true);
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}
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} else {
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if (opt_ecc_en) {
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__nvgpu_set_enabled(g,
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NVGPU_ECC_ENABLED_LTC, true);
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}
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}
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}
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}
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int gp10b_init_gpu_characteristics(struct gk20a *g)
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{
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gk20a_init_gpu_characteristics(g);
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gp10b_detect_ecc_enabled_units(g);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_RESCHEDULE_RUNLIST, true);
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return 0;
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}
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