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6c8be7cfe2
Change path corresponding to gk20a.h to <nvgpu/gk20a.h> corresponding to files in the following directories. gk20a/ vgpu/ gv100/ tu104/ common/bus/ common/fb/ common/ltc/ common/mc/ common/perf/ Jira NVGPU-597 Change-Id: I7b4f5e5ea3d13a4d1810c5db35fbc26fe5da443e Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1846826 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
82 lines
2.5 KiB
C
82 lines
2.5 KiB
C
/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/vgpu/tegra_vgpu.h>
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#include <nvgpu/vgpu/vgpu.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/channel.h>
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#include "vgpu_tsg_gv11b.h"
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int vgpu_gv11b_tsg_bind_channel(struct tsg_gk20a *tsg,
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struct channel_gk20a *ch)
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{
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_tsg_bind_channel_ex_params *p =
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&msg.params.tsg_bind_channel_ex;
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int err;
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struct gk20a *g = tsg->g;
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nvgpu_log_fn(g, " ");
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err = gk20a_tsg_bind_channel(tsg, ch);
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if (err)
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return err;
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msg.cmd = TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX;
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msg.handle = vgpu_get_handle(tsg->g);
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p->tsg_id = tsg->tsgid;
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p->ch_handle = ch->virt_ctx;
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p->subctx_id = ch->subctx_id;
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p->runqueue_sel = ch->runqueue_sel;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err) {
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nvgpu_err(tsg->g,
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"vgpu_gv11b_tsg_bind_channel failed, ch %d tsgid %d",
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ch->chid, tsg->tsgid);
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gk20a_tsg_unbind_channel(ch);
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}
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return err;
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}
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int vgpu_gv11b_enable_tsg(struct tsg_gk20a *tsg)
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{
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struct gk20a *g = tsg->g;
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struct channel_gk20a *ch;
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struct channel_gk20a *last_ch = NULL;
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nvgpu_rwsem_down_read(&tsg->ch_list_lock);
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nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) {
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g->ops.fifo.enable_channel(ch);
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last_ch = ch;
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}
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nvgpu_rwsem_up_read(&tsg->ch_list_lock);
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if (last_ch)
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g->ops.fifo.ring_channel_doorbell(last_ch);
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return 0;
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}
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