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c905858565
Add new power/clock gating functions that can be called by other units. New clock_gating functions will reside in cg.c under common/power_features/cg unit. New power gating functions will reside in pg.c under common/power_features/pg unit. Use nvgpu_pg_elpg_disable and nvgpu_pg_elpg_enable to disable/enable elpg and also in gr_gk20a_elpg_protected macro to access gr registers. Add cg_pg_lock to make elpg_enabled, elcg_enabled, blcg_enabled and slcg_enabled thread safe. JIRA NVGPU-2014 Change-Id: I00d124c2ee16242c9a3ef82e7620fbb7f1297aff Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2025493 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
107 lines
2.5 KiB
C
107 lines
2.5 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/pmu.h>
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#include <nvgpu/power_features/pg.h>
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bool nvgpu_pg_elpg_is_enabled(struct gk20a *g)
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{
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bool elpg_enabled;
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nvgpu_log_fn(g, " ");
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nvgpu_mutex_acquire(&g->cg_pg_lock);
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elpg_enabled = g->elpg_enabled;
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nvgpu_mutex_release(&g->cg_pg_lock);
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return elpg_enabled;
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}
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int nvgpu_pg_elpg_enable(struct gk20a *g)
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{
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int err = 0;
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nvgpu_log_fn(g, " ");
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if (!g->can_elpg) {
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return 0;
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}
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nvgpu_mutex_acquire(&g->cg_pg_lock);
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if (g->elpg_enabled) {
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err = nvgpu_pmu_pg_global_enable(g, true);
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}
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nvgpu_mutex_release(&g->cg_pg_lock);
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return err;
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}
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int nvgpu_pg_elpg_disable(struct gk20a *g)
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{
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int err = 0;
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nvgpu_log_fn(g, " ");
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if (!g->can_elpg) {
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return 0;
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}
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nvgpu_mutex_acquire(&g->cg_pg_lock);
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if (g->elpg_enabled) {
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err = nvgpu_pmu_pg_global_enable(g, false);
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}
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nvgpu_mutex_release(&g->cg_pg_lock);
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return err;
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}
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int nvgpu_pg_elpg_set_elpg_enabled(struct gk20a *g, bool enable)
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{
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int err = 0;
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bool change_mode = false;
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nvgpu_log_fn(g, " ");
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if (!g->can_elpg) {
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return 0;
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}
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nvgpu_mutex_acquire(&g->cg_pg_lock);
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if (enable) {
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if (!g->elpg_enabled) {
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change_mode = true;
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g->elpg_enabled = true;
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}
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} else {
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if (g->elpg_enabled) {
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change_mode = true;
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g->elpg_enabled = false;
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}
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}
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if (!change_mode) {
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goto done;
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}
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err = nvgpu_pmu_pg_global_enable(g, enable);
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done:
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nvgpu_mutex_release(&g->cg_pg_lock);
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return err;
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}
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