mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 18:16:01 +03:00
b40c655e12
Move regops (gk20a/regops_gk20a.c) to separate unit common/regops/regops.c Move corresponding header (gk20a/regops_gk20a.h) to include/nvgpu/regops.h Move rest of the platform HAL files to common/regops/ as well Fix all the header includes to include new public header Remove *_apply_smpc_war() declarations from headers. Corresponding functions were cleaned up already, and declarations were left somehow Jira NVGPU-620 Change-Id: I8b8065b9c91f69809bdeb1b4caecdc7582c8a992 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1998723 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
42 lines
1.9 KiB
C
42 lines
1.9 KiB
C
/*
|
|
*
|
|
* Tegra GK20A GPU Debugger Driver Register Ops
|
|
*
|
|
* Copyright (c) 2013-2019 NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
* DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
#ifndef NVGPU_REGOPS_GM20B_H
|
|
#define NVGPU_REGOPS_GM20B_H
|
|
|
|
const struct regop_offset_range *gm20b_get_global_whitelist_ranges(void);
|
|
u64 gm20b_get_global_whitelist_ranges_count(void);
|
|
const struct regop_offset_range *gm20b_get_context_whitelist_ranges(void);
|
|
u64 gm20b_get_context_whitelist_ranges_count(void);
|
|
const u32 *gm20b_get_runcontrol_whitelist(void);
|
|
u64 gm20b_get_runcontrol_whitelist_count(void);
|
|
const struct regop_offset_range *gm20b_get_runcontrol_whitelist_ranges(void);
|
|
u64 gm20b_get_runcontrol_whitelist_ranges_count(void);
|
|
const u32 *gm20b_get_qctl_whitelist(void);
|
|
u64 gm20b_get_qctl_whitelist_count(void);
|
|
const struct regop_offset_range *gm20b_get_qctl_whitelist_ranges(void);
|
|
u64 gm20b_get_qctl_whitelist_ranges_count(void);
|
|
|
|
#endif /* NVGPU_REGOPS_GM20B_H */
|