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6fd0d972ae
-Include qnx_init unit in doxygen documentation. -Add documentation for gk20a_busy/idle and similar functions. -Remove must_check return value as misra already reports violation for that. Jira NVGPU-2571 Change-Id: I9573cb61865677944809dcc494d92f63cc6e0f58 Signed-off-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2176755 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
70 lines
2.0 KiB
C
70 lines
2.0 KiB
C
/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/mm.h>
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#include <nvgpu/sizes.h>
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#include <nvgpu/perfbuf.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/nvgpu_init.h>
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int nvgpu_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size)
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{
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struct mm_gk20a *mm = &g->mm;
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int err;
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err = gk20a_busy(g);
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if (err != 0) {
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nvgpu_err(g, "failed to poweron");
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return err;
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}
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err = nvgpu_alloc_inst_block(g, &mm->perfbuf.inst_block);
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if (err != 0) {
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return err;
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}
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g->ops.mm.init_inst_block(&mm->perfbuf.inst_block, mm->perfbuf.vm, 0);
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g->ops.perf.membuf_reset_streaming(g);
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g->ops.perf.enable_membuf(g, size, offset, &mm->perfbuf.inst_block);
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gk20a_idle(g);
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return 0;
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}
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int nvgpu_perfbuf_disable_locked(struct gk20a *g)
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{
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int err = gk20a_busy(g);
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if (err != 0) {
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nvgpu_err(g, "failed to poweron");
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return err;
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}
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g->ops.perf.membuf_reset_streaming(g);
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g->ops.perf.disable_membuf(g);
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gk20a_idle(g);
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return 0;
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}
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