Philip Elcan b531d6d44d gpu: nvgpu: fix MISRA 10.3 errors in pd_cache ...

MISRA Rule 10.3 prohibits assigning objects to different or narrower
types. This change resolves all of the 10.3 violations in the pd_cache
unit.

JIRA NVGPU-1008

Change-Id: I5b547e0e208caea2e4204708c3a50d98919409f8
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1962046
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2018-11-29 18:55:08 -08:00

..

page_table.c

gpu: nvgpu: split the nvgpu_sgt unit from nvgpu_mem

2018-11-29 03:15:17 -08:00

pd_cache.c

gpu: nvgpu: fix MISRA 10.3 errors in pd_cache

2018-11-29 18:55:08 -08:00