Deepak Nibade aa1f8e01ce gpu: nvgpu: fix fpb_en_mask ...

In gr_gm20b_get_fbp_en_mask(), we read incorrect fuse register to get status
of enabled FBPs
And then we use incorrect arithmetic to calculate fpb_en_mask

Fix this by using correct fuse register and also doing correct arithmetic to get
mask of enabled FBPs

Bug 200398811
Jira NVGPU-556

Change-Id: I79f3ebf590faa9baf176c7a939142c379bf5ebf4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1690029
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2018-04-10 11:23:14 -07:00

..

acr_gm20b.c

gpu: nvgpu: Remove the use of READ_ONLY for DMA API

2018-02-15 12:30:33 -08:00

acr_gm20b.h

gpu: nvgpu: split init_falcon_setup_hw

2017-11-27 01:49:17 -08:00

bus_gm20b.c

gpu: nvgpu: Enable IO coherency on GV100

2018-03-07 18:04:41 -08:00

bus_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

clk_gm20b.c

gpu: nvgpu: disable throttling during vco switch

2018-03-19 11:26:25 -07:00

clk_gm20b.h

gpu: nvgpu: move platform_gk20a.h to linux

2017-11-02 10:26:21 -07:00

fb_gm20b.c

gpu: nvgpu: Introduce include/nvpgu/sizes.h

2017-12-01 08:37:08 -08:00

fb_gm20b.h

gpu: nvgpu: Alignment check for compressible fixed-address mappings

2017-11-30 18:57:19 -08:00

fifo_gm20b.c

gpu: nvgpu: Enable IO coherency on GV100

2018-03-07 18:04:41 -08:00

fifo_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

fuse_gm20b.c

gpu: nvgpu: Add check_priv_security fuse ops

2017-11-22 00:59:28 -08:00

fuse_gm20b.h

gpu: nvgpu: Add check_priv_security fuse ops

2017-11-22 00:59:28 -08:00

gm20b_gating_reglist.c

gpu: nvgpu: skip clk gating prog for sim/emu.

2017-10-04 02:24:30 -07:00

gm20b_gating_reglist.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

gr_ctx_gm20b.c

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

gr_ctx_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

gr_gm20b.c

gpu: nvgpu: fix fpb_en_mask

2018-04-10 11:23:14 -07:00

gr_gm20b.h

gpu: nvgpu: use HAL for chiplet offset

2018-04-10 11:23:11 -07:00

hal_gm20b.c

gpu: nvgpu: use HAL for chiplet offset

2018-04-10 11:23:11 -07:00

hal_gm20b.h

gpu: nvgpu: vgpu: flatten out vgpu hal

2017-10-13 15:20:18 -07:00

ltc_gm20b.c

gpu: nvgpu: Correct sign qualifiers for LTC code

2018-04-03 17:05:19 -07:00

ltc_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

mm_gm20b.c

gpu: nvgpu: Introduce include/nvpgu/sizes.h

2017-12-01 08:37:08 -08:00

mm_gm20b.h

gpu: nvgpu: Refactoring nvgpu_vm functions

2017-10-18 16:00:37 -07:00

pmu_gm20b.c

gpu: nvgpu: gv11b: Update elpg init seq for gv11b.

2017-12-08 05:13:33 -08:00

pmu_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

regops_gm20b.c

gpu: nvgpu: add corresponding whitelists for per-context registers.

2018-04-05 03:45:24 -07:00

regops_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

therm_gm20b.c

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00

therm_gm20b.h

gpu: nvgpu: Change license for common files to MIT

2017-09-26 11:37:32 -07:00