Divya Singhatwaria b6ab227016 gpu: nvgpu: Enable pmu interrupt ...

- For secure RISCV boot, enable pmu interrupt
  during pmu_rtos_init
- As interrupts are enabled, PMU intr can be received
  before driver has changed the pmu firmware state. This
  can cause the RISCV boot to fail.
- To resolve this, first change the pmu firmware state
  from off to PMU_FW_STATE_STARTING and then wait
  for pmu priv lockdown release.

Change-Id: Ib2e8b033fec6320bf9ccff02696192a48172464b
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2586325
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

2021-09-07 16:00:05 -07:00

..

gpu

gpu: nvgpu: Enable pmu interrupt

2021-09-07 16:00:05 -07:00