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d23ad1d829
Currently for every +/-5 degC change in temperature, PMU internally evaluate VF curve on temp change and will send VFE callback to NVGPU for initiating change seq to program voltage and frequency. This is the only callback we receive on temp change which we handle in perf unit, and we don't have any other temp events raised by PMU. So, deleting the therm event handler. NVGPU-4360 Change-Id: I3c7279dcf691135c178b6a05766403a935bc7e73 Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2241488 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
81 lines
2.3 KiB
C
81 lines
2.3 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/pmu/therm.h>
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#include <nvgpu/clk_arb.h>
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#include "thrm.h"
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#include "thrmpmu.h"
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int nvgpu_therm_domain_sw_setup(struct gk20a *g, struct nvgpu_pmu *pmu)
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{
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int status;
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status = therm_device_sw_setup(g);
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if (status != 0) {
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nvgpu_err(g,
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"error creating boardobjgrp for therm devices, status - 0x%x",
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status);
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goto exit;
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}
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status = therm_channel_sw_setup(g);
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if (status != 0) {
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nvgpu_err(g,
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"error creating boardobjgrp for therm channel, status - 0x%x",
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status);
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goto exit;
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}
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pmu->therm_rpc_handler = nvgpu_pmu_therm_rpc_handler;
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exit:
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return status;
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}
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int nvgpu_therm_domain_pmu_setup(struct gk20a *g, struct nvgpu_pmu *pmu)
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{
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return therm_send_pmgr_tables_to_pmu(g);
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}
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int nvgpu_therm_pmu_init_pmupstate(struct gk20a *g, struct nvgpu_pmu *pmu)
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{
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/* If already allocated, do not re-allocate */
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if (pmu->therm_pmu != NULL) {
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return 0;
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}
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pmu->therm_pmu = nvgpu_kzalloc(g, sizeof(*(pmu->therm_pmu)));
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if (pmu->therm_pmu == NULL) {
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return -ENOMEM;
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}
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return 0;
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}
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void nvgpu_therm_pmu_free_pmupstate(struct gk20a *g, struct nvgpu_pmu *pmu)
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{
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nvgpu_kfree(g, pmu->therm_pmu);
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pmu->therm_pmu = NULL;
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}
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