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bba7a89be4
The aim is to have single pmu structure inside gk20a, that is nvgpu_pmu struct and all the global structures of all units in PMU should be included in nvgpu_pmu struct. Jira NVGPU-3216 Change-Id: Idc8c6c73514049809cfbde4ca6c1ad75688a5b80 Signed-off-by: Abdul Salam <absalam@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2112732 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/pmu/therm.h>
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#include <nvgpu/clk_arb.h>
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#include "thrm.h"
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#include "thrmpmu.h"
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void nvgpu_pmu_handle_therm_event(struct gk20a *g, struct nvgpu_pmu *pmu,
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struct pmu_msg *msg, struct nv_pmu_rpc_header *rpc)
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{
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struct nv_pmu_therm_msg *msg_therm = &msg->msg.therm;
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nvgpu_log_fn(g, " ");
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if (rpc != NULL) {
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nvgpu_pmu_therm_rpc_handler(g, rpc);
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} else {
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switch (msg_therm->msg_type) {
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case NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION:
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if (msg_therm->hw_slct_msg.mask ==
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BIT(NV_PMU_THERM_EVENT_THERMAL_1)) {
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nvgpu_clk_arb_send_thermal_alarm(pmu->g);
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} else {
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nvgpu_pmu_dbg(g,
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"Unwanted/Unregistered thermal event received %d",
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msg_therm->hw_slct_msg.mask);
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}
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break;
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default:
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nvgpu_pmu_dbg(g, "unkown therm event received %d",
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msg_therm->msg_type);
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break;
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}
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}
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}
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int nvgpu_therm_domain_sw_setup(struct gk20a *g)
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{
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int status;
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status = therm_device_sw_setup(g);
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if (status != 0) {
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nvgpu_err(g,
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"error creating boardobjgrp for therm devices, status - 0x%x",
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status);
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goto exit;
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}
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status = therm_channel_sw_setup(g);
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if (status != 0) {
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nvgpu_err(g,
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"error creating boardobjgrp for therm channel, status - 0x%x",
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status);
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goto exit;
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}
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g->pmu.therm_event_handler = nvgpu_pmu_handle_therm_event;
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exit:
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return status;
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}
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int nvgpu_therm_domain_pmu_setup(struct gk20a *g)
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{
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return therm_send_pmgr_tables_to_pmu(g);
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}
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int nvgpu_therm_pmu_init_pmupstate(struct gk20a *g)
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{
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/* If already allocated, do not re-allocate */
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if (g->pmu.therm_pmu != NULL) {
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return 0;
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}
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g->pmu.therm_pmu = nvgpu_kzalloc(g, sizeof(*g->pmu.therm_pmu));
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if (g->pmu.therm_pmu == NULL) {
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return -ENOMEM;
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}
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return 0;
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}
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void nvgpu_therm_pmu_free_pmupstate(struct gk20a *g)
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{
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nvgpu_kfree(g, g->pmu.therm_pmu);
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g->pmu.therm_pmu = NULL;
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}
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