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bdfc26af8b
Move chip specific preempt code to hal/fifo Move non-chip specific preempt code to common/fifo Remove fifo.get_preempt_timeout Rename gk20a_fifo_get_preempt_timeout -> nvgpu_preempt_get_timeout Rename gk20a_fifo_preempt -> nvgpu_preempt_channel Add fifo.preempt_trigger hal for issuing preempt Add fifo.preempt_runlists_for_rc hal for preempting runlists during rc Add fifo.preempt_poll_pbdma hal Add nvgpu_preempt_poll_tsg_on_pbdma to be called from rc JIRA NVGPU-3144 Change-Id: Idb089acaa0c6ca08de17487c3496459a61f0bcd4 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2100819 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
53 lines
1.8 KiB
C
53 lines
1.8 KiB
C
/*
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* GV100 fifo
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*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/timers.h>
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#include <nvgpu/ptimer.h>
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#include <nvgpu/io.h>
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#include <nvgpu/gk20a.h>
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#include "fifo_gv100.h"
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#include <nvgpu/hw/gk20a/hw_fifo_gk20a.h>
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void gv100_fifo_intr_set_recover_mask(struct gk20a *g)
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{
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u32 val;
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val = gk20a_readl(g, fifo_intr_en_0_r());
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val &= ~(fifo_intr_en_0_sched_error_m());
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gk20a_writel(g, fifo_intr_en_0_r(), val);
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gk20a_writel(g, fifo_intr_0_r(), fifo_intr_0_sched_error_reset_f());
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}
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void gv100_fifo_intr_unset_recover_mask(struct gk20a *g)
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{
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u32 val;
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val = gk20a_readl(g, fifo_intr_en_0_r());
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val |= fifo_intr_en_0_sched_error_f(1);
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gk20a_writel(g, fifo_intr_en_0_r(), val);
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}
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