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git://nv-tegra.nvidia.com/linux-nvgpu.git
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c37c9baae6
CDE is only used in Linux platforms, and the code is highly dependent on Linux APIs. Move the common CDE code to Linux module and leave only the chip specific parts to HAL. Change-Id: I507fe7eceaf7607303dfdddcf438449a5f582ea7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1554755 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
128 lines
2.9 KiB
C
128 lines
2.9 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef NVGPU_OS_LINUX_H
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#define NVGPU_OS_LINUX_H
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#include <linux/cdev.h>
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#include "gk20a/gk20a.h"
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#include "cde.h"
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struct nvgpu_os_linux {
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struct gk20a g;
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struct device *dev;
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struct {
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struct cdev cdev;
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struct device *node;
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} channel;
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struct {
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struct cdev cdev;
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struct device *node;
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} ctrl;
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struct {
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struct cdev cdev;
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struct device *node;
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} as_dev;
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struct {
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struct cdev cdev;
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struct device *node;
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} dbg;
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struct {
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struct cdev cdev;
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struct device *node;
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} prof;
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struct {
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struct cdev cdev;
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struct device *node;
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} tsg;
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struct {
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struct cdev cdev;
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struct device *node;
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} ctxsw;
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struct {
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struct cdev cdev;
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struct device *node;
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} sched;
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dev_t cdev_region;
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struct devfreq *devfreq;
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struct device_dma_parameters dma_parms;
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atomic_t hw_irq_stall_count;
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atomic_t hw_irq_nonstall_count;
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wait_queue_head_t sw_irq_stall_last_handled_wq;
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atomic_t sw_irq_stall_last_handled;
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atomic_t nonstall_ops;
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wait_queue_head_t sw_irq_nonstall_last_handled_wq;
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atomic_t sw_irq_nonstall_last_handled;
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struct work_struct nonstall_fn_work;
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struct workqueue_struct *nonstall_work_queue;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs;
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struct dentry *debugfs_alias;
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struct dentry *debugfs_ltc_enabled;
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struct dentry *debugfs_timeouts_enabled;
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struct dentry *debugfs_gr_idle_timeout_default;
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struct dentry *debugfs_bypass_smmu;
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struct dentry *debugfs_disable_bigpage;
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struct dentry *debugfs_gr_default_attrib_cb_size;
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struct dentry *debugfs_timeslice_low_priority_us;
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struct dentry *debugfs_timeslice_medium_priority_us;
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struct dentry *debugfs_timeslice_high_priority_us;
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struct dentry *debugfs_runlist_interleave;
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struct dentry *debugfs_allocators;
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struct dentry *debugfs_xve;
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struct dentry *debugfs_kmem;
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struct dentry *debugfs_hal;
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struct dentry *debugfs_force_preemption_cilp;
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struct dentry *debugfs_force_preemption_gfxp;
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struct dentry *debugfs_dump_ctxsw_stats;
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#endif
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struct gk20a_cde_app cde_app;
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};
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static inline struct nvgpu_os_linux *nvgpu_os_linux_from_gk20a(struct gk20a *g)
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{
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return container_of(g, struct nvgpu_os_linux, g);
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}
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static inline struct device *dev_from_gk20a(struct gk20a *g)
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{
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return nvgpu_os_linux_from_gk20a(g)->dev;
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}
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#define INTERFACE_NAME "nvhost%s-gpu"
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#endif
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