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c0d5a715bd
Add -t/--test-level option for the unit test framework. This correlates with the test plan levels in GVS. L0 tests are a subset of the L1 tests. Currently, only test levels 0 and 1 are supported. The test output has been updated to display skipped tests. Skipped tests are not included in the test dump. JIRA NVGPU-2251 Change-Id: Icc2ff19a81529be8526e89f70983e96040390e00 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2085280 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
64 lines
2.6 KiB
C
64 lines
2.6 KiB
C
/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/enabled.h>
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#include <unit/unit.h>
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#include <unit/io.h>
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#include "posix-fault-injection-kmem.h"
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#include "posix-fault-injection-dma-alloc.h"
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static int test_fault_injection_init(struct unit_module *m,
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struct gk20a *g, void *__args)
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{
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nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true);
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return UNIT_SUCCESS;
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}
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struct unit_module_test fault_injection_tests[] = {
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UNIT_TEST(fault_injection_init, test_fault_injection_init, NULL, 0),
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UNIT_TEST(init, test_kmem_init, NULL, 0),
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UNIT_TEST(cache_default, test_kmem_cache_fi_default, NULL, 0),
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UNIT_TEST(cache_enabled, test_kmem_cache_fi_enabled, NULL, 0),
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UNIT_TEST(cache_delayed_enable, test_kmem_cache_fi_delayed_enable,
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NULL, 0),
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UNIT_TEST(cache_delayed_disable, test_kmem_cache_fi_delayed_disable,
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NULL, 0),
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UNIT_TEST(kmalloc_default, test_kmem_kmalloc_fi_default, NULL, 0),
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UNIT_TEST(kmalloc_enabled, test_kmem_kmalloc_fi_enabled, NULL, 0),
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UNIT_TEST(kmalloc_delayed_enable,
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test_kmem_kmalloc_fi_delayed_enable, NULL, 0),
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UNIT_TEST(kmalloc_delayed_disable,
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test_kmem_kmalloc_fi_delayed_disable, NULL, 0),
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UNIT_TEST(dma_alloc_init, test_dma_alloc_init, NULL, 0),
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UNIT_TEST(dma_alloc_default, test_dma_alloc_fi_default, NULL, 0),
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UNIT_TEST(dma_alloc_enabled, test_dma_alloc_fi_enabled, NULL, 0),
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UNIT_TEST(dma_alloc_delayed_enable, test_dma_alloc_fi_delayed_enable,
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NULL, 0),
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};
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UNIT_MODULE(fault_injection, fault_injection_tests, UNIT_PRIO_POSIX_TEST);
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