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c0e2dc5b74
This CL covers the following code changes, 1) Added api to init inst_block for more than one subctxs. 2) Added logic to limit the subctx bind based on max. VEID count allocated to a gr instance. 3) Renamed nvgpu_grmgr_get_gr_runlist_id. JIRA NVGPU-5647 Change-Id: Ifec8164a9e5f46fbd0538c3dd50e19ee63667a54 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2418463 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-by: Dinesh T <dt@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
40 lines
1.6 KiB
C
40 lines
1.6 KiB
C
/*
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* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_RAMIN_GV11B_H
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#define NVGPU_RAMIN_GV11B_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_mem;
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void gv11b_ramin_set_gr_ptr(struct gk20a *g,
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struct nvgpu_mem *inst_block, u64 gpu_va);
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void gv11b_ramin_init_subctx_pdb(struct gk20a *g,
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struct nvgpu_mem *inst_block, struct nvgpu_mem *pdb_mem,
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bool replayable, u32 max_subctx_count);
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void gv11b_ramin_set_eng_method_buffer(struct gk20a *g,
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struct nvgpu_mem *inst_block, u64 gpu_va);
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#endif /* NVGPU_RAMIN_GV11B_H */
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