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76a18f5e76
- PG statistics read support for multiple engines JIRA DNVGPU-71 Change-Id: I2dc3aad243300d21dc3d20a54a5e4736977e071b Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1250507 (cherry picked from commit 985cb3be1d6d990bc6651e417d9e6ba9bfe306e0) Reviewed-on: http://git-master/r/1270991 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
27 lines
969 B
C
27 lines
969 B
C
/*
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* GP10B PMU
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*
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* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __PMU_GP10B_H_
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#define __PMU_GP10B_H_
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void gp10b_init_pmu_ops(struct gpu_ops *gops);
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int gp10b_load_falcon_ucode(struct gk20a *g, u32 falconidmask);
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int gp10b_pg_gr_init(struct gk20a *g, u32 pg_engine_id);
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void gp10b_write_dmatrfbase(struct gk20a *g, u32 addr);
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void gp10b_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
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u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt);
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#endif /*__PMU_GP10B_H_*/
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